1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * rt5514.h -- RT5514 ALSA SoC audio driver 4 * 5 * Copyright 2015 Realtek Microelectronics 6 * Author: Oder Chiou <oder_chiou@realtek.com> 7 */ 8 9#ifndef __RT5514_H__ 10#define __RT5514_H__ 11 12#include <linux/clk.h> 13#include <sound/rt5514.h> 14 15#define RT5514_DEVICE_ID 0x10ec5514 16 17#define RT5514_RESET 0x2000 18#define RT5514_PWR_ANA1 0x2004 19#define RT5514_PWR_ANA2 0x2008 20#define RT5514_I2S_CTRL1 0x2010 21#define RT5514_I2S_CTRL2 0x2014 22#define RT5514_VAD_CTRL6 0x2030 23#define RT5514_EXT_VAD_CTRL 0x206c 24#define RT5514_DIG_IO_CTRL 0x2070 25#define RT5514_PAD_CTRL1 0x2080 26#define RT5514_DMIC_DATA_CTRL 0x20a0 27#define RT5514_DIG_SOURCE_CTRL 0x20a4 28#define RT5514_SRC_CTRL 0x20ac 29#define RT5514_DOWNFILTER2_CTRL1 0x20d0 30#define RT5514_PLL_SOURCE_CTRL 0x2100 31#define RT5514_CLK_CTRL1 0x2104 32#define RT5514_CLK_CTRL2 0x2108 33#define RT5514_PLL3_CALIB_CTRL1 0x2110 34#define RT5514_PLL3_CALIB_CTRL4 0x2120 35#define RT5514_PLL3_CALIB_CTRL5 0x2124 36#define RT5514_PLL3_CALIB_CTRL6 0x2128 37#define RT5514_DELAY_BUF_CTRL1 0x2140 38#define RT5514_DELAY_BUF_CTRL3 0x2148 39#define RT5514_ASRC_IN_CTRL1 0x2180 40#define RT5514_DOWNFILTER0_CTRL1 0x2190 41#define RT5514_DOWNFILTER0_CTRL2 0x2194 42#define RT5514_DOWNFILTER0_CTRL3 0x2198 43#define RT5514_DOWNFILTER1_CTRL1 0x21a0 44#define RT5514_DOWNFILTER1_CTRL2 0x21a4 45#define RT5514_DOWNFILTER1_CTRL3 0x21a8 46#define RT5514_ANA_CTRL_LDO10 0x2200 47#define RT5514_ANA_CTRL_LDO18_16 0x2204 48#define RT5514_ANA_CTRL_ADC12 0x2210 49#define RT5514_ANA_CTRL_ADC21 0x2214 50#define RT5514_ANA_CTRL_ADC22 0x2218 51#define RT5514_ANA_CTRL_ADC23 0x221c 52#define RT5514_ANA_CTRL_MICBST 0x2220 53#define RT5514_ANA_CTRL_ADCFED 0x2224 54#define RT5514_ANA_CTRL_INBUF 0x2228 55#define RT5514_ANA_CTRL_VREF 0x222c 56#define RT5514_ANA_CTRL_PLL3 0x2240 57#define RT5514_ANA_CTRL_PLL1_1 0x2260 58#define RT5514_ANA_CTRL_PLL1_2 0x2264 59#define RT5514_DMIC_LP_CTRL 0x2e00 60#define RT5514_MISC_CTRL_DSP 0x2e04 61#define RT5514_DSP_CTRL1 0x2f00 62#define RT5514_DSP_CTRL3 0x2f08 63#define RT5514_DSP_CTRL4 0x2f10 64#define RT5514_VENDOR_ID1 0x2ff0 65#define RT5514_VENDOR_ID2 0x2ff4 66 67#define RT5514_DSP_MAPPING 0x18000000 68 69/* RT5514_PWR_ANA1 (0x2004) */ 70#define RT5514_POW_LDO18_IN (0x1 << 5) 71#define RT5514_POW_LDO18_IN_BIT 5 72#define RT5514_POW_LDO18_ADC (0x1 << 4) 73#define RT5514_POW_LDO18_ADC_BIT 4 74#define RT5514_POW_LDO21 (0x1 << 3) 75#define RT5514_POW_LDO21_BIT 3 76#define RT5514_POW_BG_LDO18_IN (0x1 << 2) 77#define RT5514_POW_BG_LDO18_IN_BIT 2 78#define RT5514_POW_BG_LDO21 (0x1 << 1) 79#define RT5514_POW_BG_LDO21_BIT 1 80 81/* RT5514_PWR_ANA2 (0x2008) */ 82#define RT5514_POW_PLL1 (0x1 << 18) 83#define RT5514_POW_PLL1_BIT 18 84#define RT5514_POW_PLL1_LDO (0x1 << 16) 85#define RT5514_POW_PLL1_LDO_BIT 16 86#define RT5514_POW_BG_MBIAS (0x1 << 15) 87#define RT5514_POW_BG_MBIAS_BIT 15 88#define RT5514_POW_MBIAS (0x1 << 14) 89#define RT5514_POW_MBIAS_BIT 14 90#define RT5514_POW_VREF2 (0x1 << 13) 91#define RT5514_POW_VREF2_BIT 13 92#define RT5514_POW_VREF1 (0x1 << 12) 93#define RT5514_POW_VREF1_BIT 12 94#define RT5514_POWR_LDO16 (0x1 << 11) 95#define RT5514_POWR_LDO16_BIT 11 96#define RT5514_POWL_LDO16 (0x1 << 10) 97#define RT5514_POWL_LDO16_BIT 10 98#define RT5514_POW_ADC2 (0x1 << 9) 99#define RT5514_POW_ADC2_BIT 9 100#define RT5514_POW_INPUT_BUF (0x1 << 8) 101#define RT5514_POW_INPUT_BUF_BIT 8 102#define RT5514_POW_ADC1_R (0x1 << 7) 103#define RT5514_POW_ADC1_R_BIT 7 104#define RT5514_POW_ADC1_L (0x1 << 6) 105#define RT5514_POW_ADC1_L_BIT 6 106#define RT5514_POW2_BSTR (0x1 << 5) 107#define RT5514_POW2_BSTR_BIT 5 108#define RT5514_POW2_BSTL (0x1 << 4) 109#define RT5514_POW2_BSTL_BIT 4 110#define RT5514_POW_BSTR (0x1 << 3) 111#define RT5514_POW_BSTR_BIT 3 112#define RT5514_POW_BSTL (0x1 << 2) 113#define RT5514_POW_BSTL_BIT 2 114#define RT5514_POW_ADCFEDR (0x1 << 1) 115#define RT5514_POW_ADCFEDR_BIT 1 116#define RT5514_POW_ADCFEDL (0x1 << 0) 117#define RT5514_POW_ADCFEDL_BIT 0 118 119/* RT5514_I2S_CTRL1 (0x2010) */ 120#define RT5514_TDM_MODE2 (0x1 << 30) 121#define RT5514_TDM_MODE2_SFT 30 122#define RT5514_TDM_MODE (0x1 << 28) 123#define RT5514_TDM_MODE_SFT 28 124#define RT5514_I2S_LR_MASK (0x1 << 26) 125#define RT5514_I2S_LR_SFT 26 126#define RT5514_I2S_LR_NOR (0x0 << 26) 127#define RT5514_I2S_LR_INV (0x1 << 26) 128#define RT5514_I2S_BP_MASK (0x1 << 25) 129#define RT5514_I2S_BP_SFT 25 130#define RT5514_I2S_BP_NOR (0x0 << 25) 131#define RT5514_I2S_BP_INV (0x1 << 25) 132#define RT5514_I2S_DF_MASK (0x7 << 16) 133#define RT5514_I2S_DF_SFT 16 134#define RT5514_I2S_DF_I2S (0x0 << 16) 135#define RT5514_I2S_DF_LEFT (0x1 << 16) 136#define RT5514_I2S_DF_PCM_A (0x2 << 16) 137#define RT5514_I2S_DF_PCM_B (0x3 << 16) 138#define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10) 139#define RT5514_TDMSLOT_SEL_RX_SFT 10 140#define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10) 141#define RT5514_TDMSLOT_SEL_RX_6CH (0x2 << 10) 142#define RT5514_TDMSLOT_SEL_RX_8CH (0x3 << 10) 143#define RT5514_CH_LEN_RX_MASK (0x3 << 8) 144#define RT5514_CH_LEN_RX_SFT 8 145#define RT5514_CH_LEN_RX_16 (0x0 << 8) 146#define RT5514_CH_LEN_RX_20 (0x1 << 8) 147#define RT5514_CH_LEN_RX_24 (0x2 << 8) 148#define RT5514_CH_LEN_RX_32 (0x3 << 8) 149#define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6) 150#define RT5514_TDMSLOT_SEL_TX_SFT 6 151#define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6) 152#define RT5514_TDMSLOT_SEL_TX_6CH (0x2 << 6) 153#define RT5514_TDMSLOT_SEL_TX_8CH (0x3 << 6) 154#define RT5514_CH_LEN_TX_MASK (0x3 << 4) 155#define RT5514_CH_LEN_TX_SFT 4 156#define RT5514_CH_LEN_TX_16 (0x0 << 4) 157#define RT5514_CH_LEN_TX_20 (0x1 << 4) 158#define RT5514_CH_LEN_TX_24 (0x2 << 4) 159#define RT5514_CH_LEN_TX_32 (0x3 << 4) 160#define RT5514_I2S_DL_MASK (0x3 << 0) 161#define RT5514_I2S_DL_SFT 0 162#define RT5514_I2S_DL_16 (0x0 << 0) 163#define RT5514_I2S_DL_20 (0x1 << 0) 164#define RT5514_I2S_DL_24 (0x2 << 0) 165#define RT5514_I2S_DL_8 (0x3 << 0) 166 167/* RT5514_I2S_CTRL2 (0x2014) */ 168#define RT5514_TDM_DOCKING_MODE (0x1 << 31) 169#define RT5514_TDM_DOCKING_MODE_SFT 31 170#define RT5514_TDM_DOCKING_VALID_CH_MASK (0x1 << 29) 171#define RT5514_TDM_DOCKING_VALID_CH_SFT 29 172#define RT5514_TDM_DOCKING_VALID_CH2 (0x0 << 29) 173#define RT5514_TDM_DOCKING_VALID_CH4 (0x1 << 29) 174#define RT5514_TDM_DOCKING_START_MASK (0x1 << 28) 175#define RT5514_TDM_DOCKING_START_SFT 28 176#define RT5514_TDM_DOCKING_START_SLOT0 (0x0 << 28) 177#define RT5514_TDM_DOCKING_START_SLOT4 (0x1 << 28) 178 179/* RT5514_DIG_SOURCE_CTRL (0x20a4) */ 180#define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1) 181#define RT5514_AD1_DMIC_INPUT_SEL_SFT 1 182#define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0) 183#define RT5514_AD0_DMIC_INPUT_SEL_SFT 0 184 185/* RT5514_PLL_SOURCE_CTRL (0x2100) */ 186#define RT5514_PLL_1_SEL_MASK (0x7 << 12) 187#define RT5514_PLL_1_SEL_SFT 12 188#define RT5514_PLL_1_SEL_SCLK (0x3 << 12) 189#define RT5514_PLL_1_SEL_MCLK (0x4 << 12) 190 191/* RT5514_CLK_CTRL1 (0x2104) */ 192#define RT5514_CLK_AD_ANA1_EN (0x1 << 31) 193#define RT5514_CLK_AD_ANA1_EN_BIT 31 194#define RT5514_CLK_AD1_EN (0x1 << 24) 195#define RT5514_CLK_AD1_EN_BIT 24 196#define RT5514_CLK_AD0_EN (0x1 << 23) 197#define RT5514_CLK_AD0_EN_BIT 23 198#define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8) 199#define RT5514_CLK_DMIC_OUT_SEL_SFT 8 200#define RT5514_CLK_AD_ANA1_SEL_MASK (0xf << 0) 201#define RT5514_CLK_AD_ANA1_SEL_SFT 0 202 203/* RT5514_CLK_CTRL2 (0x2108) */ 204#define RT5514_CLK_AD1_ASRC_EN (0x1 << 17) 205#define RT5514_CLK_AD1_ASRC_EN_BIT 17 206#define RT5514_CLK_AD0_ASRC_EN (0x1 << 16) 207#define RT5514_CLK_AD0_ASRC_EN_BIT 16 208#define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8) 209#define RT5514_CLK_SYS_DIV_OUT_SFT 8 210#define RT5514_SEL_ADC_OSR_MASK (0x7 << 4) 211#define RT5514_SEL_ADC_OSR_SFT 4 212#define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0) 213#define RT5514_CLK_SYS_PRE_SEL_SFT 0 214#define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0) 215#define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0) 216 217/* RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */ 218#define RT5514_AD_DMIC_MIX (0x1 << 11) 219#define RT5514_AD_DMIC_MIX_BIT 11 220#define RT5514_AD_AD_MIX (0x1 << 10) 221#define RT5514_AD_AD_MIX_BIT 10 222#define RT5514_AD_AD_MUTE (0x1 << 7) 223#define RT5514_AD_AD_MUTE_BIT 7 224#define RT5514_AD_GAIN_MASK (0x3f << 1) 225#define RT5514_AD_GAIN_SFT 1 226 227/* RT5514_ANA_CTRL_MICBST (0x2220) */ 228#define RT5514_SEL_BSTL_MASK (0xf << 4) 229#define RT5514_SEL_BSTL_SFT 4 230#define RT5514_SEL_BSTR_MASK (0xf << 0) 231#define RT5514_SEL_BSTR_SFT 0 232 233/* RT5514_ANA_CTRL_PLL1_1 (0x2260) */ 234#define RT5514_PLL_K_MAX 0x1f 235#define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16) 236#define RT5514_PLL_K_SFT 16 237#define RT5514_PLL_N_MAX 0x1ff 238#define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7) 239#define RT5514_PLL_N_SFT 4 240#define RT5514_PLL_M_MAX 0xf 241#define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0) 242#define RT5514_PLL_M_SFT 0 243 244/* RT5514_ANA_CTRL_PLL1_2 (0x2264) */ 245#define RT5514_PLL_M_BP (0x1 << 2) 246#define RT5514_PLL_M_BP_SFT 2 247#define RT5514_PLL_K_BP (0x1 << 1) 248#define RT5514_PLL_K_BP_SFT 1 249#define RT5514_EN_LDO_PLL1 (0x1 << 0) 250#define RT5514_EN_LDO_PLL1_BIT 0 251 252#define RT5514_PLL_INP_MAX 40000000 253#define RT5514_PLL_INP_MIN 256000 254 255#define RT5514_FIRMWARE1 "rt5514_dsp_fw1.bin" 256#define RT5514_FIRMWARE2 "rt5514_dsp_fw2.bin" 257 258/* System Clock Source */ 259enum { 260 RT5514_SCLK_S_MCLK, 261 RT5514_SCLK_S_PLL1, 262}; 263 264/* PLL1 Source */ 265enum { 266 RT5514_PLL1_S_MCLK, 267 RT5514_PLL1_S_BCLK, 268}; 269 270struct rt5514_priv { 271 struct rt5514_platform_data pdata; 272 struct snd_soc_component *component; 273 struct regmap *i2c_regmap, *regmap; 274 struct clk *mclk, *dsp_calib_clk; 275 int sysclk; 276 int sysclk_src; 277 int lrck; 278 int bclk; 279 int pll_src; 280 int pll_in; 281 int pll_out; 282 int dsp_enabled; 283 unsigned int pll3_cal_value; 284}; 285 286#endif /* __RT5514_H__ */ 287