1/* SPDX-License-Identifier: GPL-2.0-only */ 2#ifndef _WM8737_H 3#define _WM8737_H 4 5/* 6 * wm8737.c -- WM8523 ALSA SoC Audio driver 7 * 8 * Copyright 2010 Wolfson Microelectronics plc 9 * 10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 11 */ 12 13/* 14 * Register values. 15 */ 16#define WM8737_LEFT_PGA_VOLUME 0x00 17#define WM8737_RIGHT_PGA_VOLUME 0x01 18#define WM8737_AUDIO_PATH_L 0x02 19#define WM8737_AUDIO_PATH_R 0x03 20#define WM8737_3D_ENHANCE 0x04 21#define WM8737_ADC_CONTROL 0x05 22#define WM8737_POWER_MANAGEMENT 0x06 23#define WM8737_AUDIO_FORMAT 0x07 24#define WM8737_CLOCKING 0x08 25#define WM8737_MIC_PREAMP_CONTROL 0x09 26#define WM8737_MISC_BIAS_CONTROL 0x0A 27#define WM8737_NOISE_GATE 0x0B 28#define WM8737_ALC1 0x0C 29#define WM8737_ALC2 0x0D 30#define WM8737_ALC3 0x0E 31#define WM8737_RESET 0x0F 32 33#define WM8737_REGISTER_COUNT 16 34#define WM8737_MAX_REGISTER 0x0F 35 36/* 37 * Field Definitions. 38 */ 39 40/* 41 * R0 (0x00) - Left PGA volume 42 */ 43#define WM8737_LVU 0x0100 /* LVU */ 44#define WM8737_LVU_MASK 0x0100 /* LVU */ 45#define WM8737_LVU_SHIFT 8 /* LVU */ 46#define WM8737_LVU_WIDTH 1 /* LVU */ 47#define WM8737_LINVOL_MASK 0x00FF /* LINVOL - [7:0] */ 48#define WM8737_LINVOL_SHIFT 0 /* LINVOL - [7:0] */ 49#define WM8737_LINVOL_WIDTH 8 /* LINVOL - [7:0] */ 50 51/* 52 * R1 (0x01) - Right PGA volume 53 */ 54#define WM8737_RVU 0x0100 /* RVU */ 55#define WM8737_RVU_MASK 0x0100 /* RVU */ 56#define WM8737_RVU_SHIFT 8 /* RVU */ 57#define WM8737_RVU_WIDTH 1 /* RVU */ 58#define WM8737_RINVOL_MASK 0x00FF /* RINVOL - [7:0] */ 59#define WM8737_RINVOL_SHIFT 0 /* RINVOL - [7:0] */ 60#define WM8737_RINVOL_WIDTH 8 /* RINVOL - [7:0] */ 61 62/* 63 * R2 (0x02) - AUDIO path L 64 */ 65#define WM8737_LINSEL_MASK 0x0180 /* LINSEL - [8:7] */ 66#define WM8737_LINSEL_SHIFT 7 /* LINSEL - [8:7] */ 67#define WM8737_LINSEL_WIDTH 2 /* LINSEL - [8:7] */ 68#define WM8737_LMICBOOST_MASK 0x0060 /* LMICBOOST - [6:5] */ 69#define WM8737_LMICBOOST_SHIFT 5 /* LMICBOOST - [6:5] */ 70#define WM8737_LMICBOOST_WIDTH 2 /* LMICBOOST - [6:5] */ 71#define WM8737_LMBE 0x0010 /* LMBE */ 72#define WM8737_LMBE_MASK 0x0010 /* LMBE */ 73#define WM8737_LMBE_SHIFT 4 /* LMBE */ 74#define WM8737_LMBE_WIDTH 1 /* LMBE */ 75#define WM8737_LMZC 0x0008 /* LMZC */ 76#define WM8737_LMZC_MASK 0x0008 /* LMZC */ 77#define WM8737_LMZC_SHIFT 3 /* LMZC */ 78#define WM8737_LMZC_WIDTH 1 /* LMZC */ 79#define WM8737_LPZC 0x0004 /* LPZC */ 80#define WM8737_LPZC_MASK 0x0004 /* LPZC */ 81#define WM8737_LPZC_SHIFT 2 /* LPZC */ 82#define WM8737_LPZC_WIDTH 1 /* LPZC */ 83#define WM8737_LZCTO_MASK 0x0003 /* LZCTO - [1:0] */ 84#define WM8737_LZCTO_SHIFT 0 /* LZCTO - [1:0] */ 85#define WM8737_LZCTO_WIDTH 2 /* LZCTO - [1:0] */ 86 87/* 88 * R3 (0x03) - AUDIO path R 89 */ 90#define WM8737_RINSEL_MASK 0x0180 /* RINSEL - [8:7] */ 91#define WM8737_RINSEL_SHIFT 7 /* RINSEL - [8:7] */ 92#define WM8737_RINSEL_WIDTH 2 /* RINSEL - [8:7] */ 93#define WM8737_RMICBOOST_MASK 0x0060 /* RMICBOOST - [6:5] */ 94#define WM8737_RMICBOOST_SHIFT 5 /* RMICBOOST - [6:5] */ 95#define WM8737_RMICBOOST_WIDTH 2 /* RMICBOOST - [6:5] */ 96#define WM8737_RMBE 0x0010 /* RMBE */ 97#define WM8737_RMBE_MASK 0x0010 /* RMBE */ 98#define WM8737_RMBE_SHIFT 4 /* RMBE */ 99#define WM8737_RMBE_WIDTH 1 /* RMBE */ 100#define WM8737_RMZC 0x0008 /* RMZC */ 101#define WM8737_RMZC_MASK 0x0008 /* RMZC */ 102#define WM8737_RMZC_SHIFT 3 /* RMZC */ 103#define WM8737_RMZC_WIDTH 1 /* RMZC */ 104#define WM8737_RPZC 0x0004 /* RPZC */ 105#define WM8737_RPZC_MASK 0x0004 /* RPZC */ 106#define WM8737_RPZC_SHIFT 2 /* RPZC */ 107#define WM8737_RPZC_WIDTH 1 /* RPZC */ 108#define WM8737_RZCTO_MASK 0x0003 /* RZCTO - [1:0] */ 109#define WM8737_RZCTO_SHIFT 0 /* RZCTO - [1:0] */ 110#define WM8737_RZCTO_WIDTH 2 /* RZCTO - [1:0] */ 111 112/* 113 * R4 (0x04) - 3D Enhance 114 */ 115#define WM8737_DIV2 0x0080 /* DIV2 */ 116#define WM8737_DIV2_MASK 0x0080 /* DIV2 */ 117#define WM8737_DIV2_SHIFT 7 /* DIV2 */ 118#define WM8737_DIV2_WIDTH 1 /* DIV2 */ 119#define WM8737_3DLC 0x0040 /* 3DLC */ 120#define WM8737_3DLC_MASK 0x0040 /* 3DLC */ 121#define WM8737_3DLC_SHIFT 6 /* 3DLC */ 122#define WM8737_3DLC_WIDTH 1 /* 3DLC */ 123#define WM8737_3DUC 0x0020 /* 3DUC */ 124#define WM8737_3DUC_MASK 0x0020 /* 3DUC */ 125#define WM8737_3DUC_SHIFT 5 /* 3DUC */ 126#define WM8737_3DUC_WIDTH 1 /* 3DUC */ 127#define WM8737_3DDEPTH_MASK 0x001E /* 3DDEPTH - [4:1] */ 128#define WM8737_3DDEPTH_SHIFT 1 /* 3DDEPTH - [4:1] */ 129#define WM8737_3DDEPTH_WIDTH 4 /* 3DDEPTH - [4:1] */ 130#define WM8737_3DE 0x0001 /* 3DE */ 131#define WM8737_3DE_MASK 0x0001 /* 3DE */ 132#define WM8737_3DE_SHIFT 0 /* 3DE */ 133#define WM8737_3DE_WIDTH 1 /* 3DE */ 134 135/* 136 * R5 (0x05) - ADC Control 137 */ 138#define WM8737_MONOMIX_MASK 0x0180 /* MONOMIX - [8:7] */ 139#define WM8737_MONOMIX_SHIFT 7 /* MONOMIX - [8:7] */ 140#define WM8737_MONOMIX_WIDTH 2 /* MONOMIX - [8:7] */ 141#define WM8737_POLARITY_MASK 0x0060 /* POLARITY - [6:5] */ 142#define WM8737_POLARITY_SHIFT 5 /* POLARITY - [6:5] */ 143#define WM8737_POLARITY_WIDTH 2 /* POLARITY - [6:5] */ 144#define WM8737_HPOR 0x0010 /* HPOR */ 145#define WM8737_HPOR_MASK 0x0010 /* HPOR */ 146#define WM8737_HPOR_SHIFT 4 /* HPOR */ 147#define WM8737_HPOR_WIDTH 1 /* HPOR */ 148#define WM8737_LP 0x0004 /* LP */ 149#define WM8737_LP_MASK 0x0004 /* LP */ 150#define WM8737_LP_SHIFT 2 /* LP */ 151#define WM8737_LP_WIDTH 1 /* LP */ 152#define WM8737_MONOUT 0x0002 /* MONOUT */ 153#define WM8737_MONOUT_MASK 0x0002 /* MONOUT */ 154#define WM8737_MONOUT_SHIFT 1 /* MONOUT */ 155#define WM8737_MONOUT_WIDTH 1 /* MONOUT */ 156#define WM8737_ADCHPD 0x0001 /* ADCHPD */ 157#define WM8737_ADCHPD_MASK 0x0001 /* ADCHPD */ 158#define WM8737_ADCHPD_SHIFT 0 /* ADCHPD */ 159#define WM8737_ADCHPD_WIDTH 1 /* ADCHPD */ 160 161/* 162 * R6 (0x06) - Power Management 163 */ 164#define WM8737_VMID 0x0100 /* VMID */ 165#define WM8737_VMID_MASK 0x0100 /* VMID */ 166#define WM8737_VMID_SHIFT 8 /* VMID */ 167#define WM8737_VMID_WIDTH 1 /* VMID */ 168#define WM8737_VREF 0x0080 /* VREF */ 169#define WM8737_VREF_MASK 0x0080 /* VREF */ 170#define WM8737_VREF_SHIFT 7 /* VREF */ 171#define WM8737_VREF_WIDTH 1 /* VREF */ 172#define WM8737_AI 0x0040 /* AI */ 173#define WM8737_AI_MASK 0x0040 /* AI */ 174#define WM8737_AI_SHIFT 6 /* AI */ 175#define WM8737_AI_WIDTH 1 /* AI */ 176#define WM8737_PGL 0x0020 /* PGL */ 177#define WM8737_PGL_MASK 0x0020 /* PGL */ 178#define WM8737_PGL_SHIFT 5 /* PGL */ 179#define WM8737_PGL_WIDTH 1 /* PGL */ 180#define WM8737_PGR 0x0010 /* PGR */ 181#define WM8737_PGR_MASK 0x0010 /* PGR */ 182#define WM8737_PGR_SHIFT 4 /* PGR */ 183#define WM8737_PGR_WIDTH 1 /* PGR */ 184#define WM8737_ADL 0x0008 /* ADL */ 185#define WM8737_ADL_MASK 0x0008 /* ADL */ 186#define WM8737_ADL_SHIFT 3 /* ADL */ 187#define WM8737_ADL_WIDTH 1 /* ADL */ 188#define WM8737_ADR 0x0004 /* ADR */ 189#define WM8737_ADR_MASK 0x0004 /* ADR */ 190#define WM8737_ADR_SHIFT 2 /* ADR */ 191#define WM8737_ADR_WIDTH 1 /* ADR */ 192#define WM8737_MICBIAS_MASK 0x0003 /* MICBIAS - [1:0] */ 193#define WM8737_MICBIAS_SHIFT 0 /* MICBIAS - [1:0] */ 194#define WM8737_MICBIAS_WIDTH 2 /* MICBIAS - [1:0] */ 195 196/* 197 * R7 (0x07) - Audio Format 198 */ 199#define WM8737_SDODIS 0x0080 /* SDODIS */ 200#define WM8737_SDODIS_MASK 0x0080 /* SDODIS */ 201#define WM8737_SDODIS_SHIFT 7 /* SDODIS */ 202#define WM8737_SDODIS_WIDTH 1 /* SDODIS */ 203#define WM8737_MS 0x0040 /* MS */ 204#define WM8737_MS_MASK 0x0040 /* MS */ 205#define WM8737_MS_SHIFT 6 /* MS */ 206#define WM8737_MS_WIDTH 1 /* MS */ 207#define WM8737_LRP 0x0010 /* LRP */ 208#define WM8737_LRP_MASK 0x0010 /* LRP */ 209#define WM8737_LRP_SHIFT 4 /* LRP */ 210#define WM8737_LRP_WIDTH 1 /* LRP */ 211#define WM8737_WL_MASK 0x000C /* WL - [3:2] */ 212#define WM8737_WL_SHIFT 2 /* WL - [3:2] */ 213#define WM8737_WL_WIDTH 2 /* WL - [3:2] */ 214#define WM8737_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */ 215#define WM8737_FORMAT_SHIFT 0 /* FORMAT - [1:0] */ 216#define WM8737_FORMAT_WIDTH 2 /* FORMAT - [1:0] */ 217 218/* 219 * R8 (0x08) - Clocking 220 */ 221#define WM8737_AUTODETECT 0x0080 /* AUTODETECT */ 222#define WM8737_AUTODETECT_MASK 0x0080 /* AUTODETECT */ 223#define WM8737_AUTODETECT_SHIFT 7 /* AUTODETECT */ 224#define WM8737_AUTODETECT_WIDTH 1 /* AUTODETECT */ 225#define WM8737_CLKDIV2 0x0040 /* CLKDIV2 */ 226#define WM8737_CLKDIV2_MASK 0x0040 /* CLKDIV2 */ 227#define WM8737_CLKDIV2_SHIFT 6 /* CLKDIV2 */ 228#define WM8737_CLKDIV2_WIDTH 1 /* CLKDIV2 */ 229#define WM8737_SR_MASK 0x003E /* SR - [5:1] */ 230#define WM8737_SR_SHIFT 1 /* SR - [5:1] */ 231#define WM8737_SR_WIDTH 5 /* SR - [5:1] */ 232#define WM8737_USB_MODE 0x0001 /* USB MODE */ 233#define WM8737_USB_MODE_MASK 0x0001 /* USB MODE */ 234#define WM8737_USB_MODE_SHIFT 0 /* USB MODE */ 235#define WM8737_USB_MODE_WIDTH 1 /* USB MODE */ 236 237/* 238 * R9 (0x09) - MIC Preamp Control 239 */ 240#define WM8737_RBYPEN 0x0008 /* RBYPEN */ 241#define WM8737_RBYPEN_MASK 0x0008 /* RBYPEN */ 242#define WM8737_RBYPEN_SHIFT 3 /* RBYPEN */ 243#define WM8737_RBYPEN_WIDTH 1 /* RBYPEN */ 244#define WM8737_LBYPEN 0x0004 /* LBYPEN */ 245#define WM8737_LBYPEN_MASK 0x0004 /* LBYPEN */ 246#define WM8737_LBYPEN_SHIFT 2 /* LBYPEN */ 247#define WM8737_LBYPEN_WIDTH 1 /* LBYPEN */ 248#define WM8737_MBCTRL_MASK 0x0003 /* MBCTRL - [1:0] */ 249#define WM8737_MBCTRL_SHIFT 0 /* MBCTRL - [1:0] */ 250#define WM8737_MBCTRL_WIDTH 2 /* MBCTRL - [1:0] */ 251 252/* 253 * R10 (0x0A) - Misc Bias Control 254 */ 255#define WM8737_VMIDSEL_MASK 0x000C /* VMIDSEL - [3:2] */ 256#define WM8737_VMIDSEL_SHIFT 2 /* VMIDSEL - [3:2] */ 257#define WM8737_VMIDSEL_WIDTH 2 /* VMIDSEL - [3:2] */ 258#define WM8737_LINPUT1_DC_BIAS_ENABLE 0x0002 /* LINPUT1 DC BIAS ENABLE */ 259#define WM8737_LINPUT1_DC_BIAS_ENABLE_MASK 0x0002 /* LINPUT1 DC BIAS ENABLE */ 260#define WM8737_LINPUT1_DC_BIAS_ENABLE_SHIFT 1 /* LINPUT1 DC BIAS ENABLE */ 261#define WM8737_LINPUT1_DC_BIAS_ENABLE_WIDTH 1 /* LINPUT1 DC BIAS ENABLE */ 262#define WM8737_RINPUT1_DC_BIAS_ENABLE 0x0001 /* RINPUT1 DC BIAS ENABLE */ 263#define WM8737_RINPUT1_DC_BIAS_ENABLE_MASK 0x0001 /* RINPUT1 DC BIAS ENABLE */ 264#define WM8737_RINPUT1_DC_BIAS_ENABLE_SHIFT 0 /* RINPUT1 DC BIAS ENABLE */ 265#define WM8737_RINPUT1_DC_BIAS_ENABLE_WIDTH 1 /* RINPUT1 DC BIAS ENABLE */ 266 267/* 268 * R11 (0x0B) - Noise Gate 269 */ 270#define WM8737_NGTH_MASK 0x001C /* NGTH - [4:2] */ 271#define WM8737_NGTH_SHIFT 2 /* NGTH - [4:2] */ 272#define WM8737_NGTH_WIDTH 3 /* NGTH - [4:2] */ 273#define WM8737_NGAT 0x0001 /* NGAT */ 274#define WM8737_NGAT_MASK 0x0001 /* NGAT */ 275#define WM8737_NGAT_SHIFT 0 /* NGAT */ 276#define WM8737_NGAT_WIDTH 1 /* NGAT */ 277 278/* 279 * R12 (0x0C) - ALC1 280 */ 281#define WM8737_ALCSEL_MASK 0x0180 /* ALCSEL - [8:7] */ 282#define WM8737_ALCSEL_SHIFT 7 /* ALCSEL - [8:7] */ 283#define WM8737_ALCSEL_WIDTH 2 /* ALCSEL - [8:7] */ 284#define WM8737_MAX_GAIN_MASK 0x0070 /* MAX GAIN - [6:4] */ 285#define WM8737_MAX_GAIN_SHIFT 4 /* MAX GAIN - [6:4] */ 286#define WM8737_MAX_GAIN_WIDTH 3 /* MAX GAIN - [6:4] */ 287#define WM8737_ALCL_MASK 0x000F /* ALCL - [3:0] */ 288#define WM8737_ALCL_SHIFT 0 /* ALCL - [3:0] */ 289#define WM8737_ALCL_WIDTH 4 /* ALCL - [3:0] */ 290 291/* 292 * R13 (0x0D) - ALC2 293 */ 294#define WM8737_ALCZCE 0x0010 /* ALCZCE */ 295#define WM8737_ALCZCE_MASK 0x0010 /* ALCZCE */ 296#define WM8737_ALCZCE_SHIFT 4 /* ALCZCE */ 297#define WM8737_ALCZCE_WIDTH 1 /* ALCZCE */ 298#define WM8737_HLD_MASK 0x000F /* HLD - [3:0] */ 299#define WM8737_HLD_SHIFT 0 /* HLD - [3:0] */ 300#define WM8737_HLD_WIDTH 4 /* HLD - [3:0] */ 301 302/* 303 * R14 (0x0E) - ALC3 304 */ 305#define WM8737_DCY_MASK 0x00F0 /* DCY - [7:4] */ 306#define WM8737_DCY_SHIFT 4 /* DCY - [7:4] */ 307#define WM8737_DCY_WIDTH 4 /* DCY - [7:4] */ 308#define WM8737_ATK_MASK 0x000F /* ATK - [3:0] */ 309#define WM8737_ATK_SHIFT 0 /* ATK - [3:0] */ 310#define WM8737_ATK_WIDTH 4 /* ATK - [3:0] */ 311 312/* 313 * R15 (0x0F) - Reset 314 */ 315#define WM8737_RESET_MASK 0x01FF /* RESET - [8:0] */ 316#define WM8737_RESET_SHIFT 0 /* RESET - [8:0] */ 317#define WM8737_RESET_WIDTH 9 /* RESET - [8:0] */ 318 319#endif 320