LXR linux/sound/soc/loongson/loongson

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * ALSA I2S interface for the Loongson platform
   4 *
   5 * Copyright (C) 2023 Loongson Technology Corporation Limited
   6 * Author: Yingkun Meng <mengyingkun@loongson.cn>
   7 */
   8
   9#ifndef _LOONGSON_I2S_H
  10#define _LOONGSON_I2S_H
  11
  12#include <linux/regmap.h>
  13#include <sound/dmaengine_pcm.h>
  14
  15/* I2S Common Registers */
  16#define LS_I2S_VER      0x00 /* I2S Version */
  17#define LS_I2S_CFG      0x04 /* I2S Config */
  18#define LS_I2S_CTRL     0x08 /* I2S Control */
  19#define LS_I2S_RX_DATA  0x0C /* I2S DMA RX Address */
  20#define LS_I2S_TX_DATA  0x10 /* I2S DMA TX Address */
  21
  22/* 2K2000 I2S Specify Registers */
  23#define LS_I2S_CFG1     0x14 /* I2S Config1 */
  24
  25/* 7A2000 I2S Specify Registers */
  26#define LS_I2S_TX_ORDER 0x100 /* TX DMA Order */
  27#define LS_I2S_RX_ORDER 0x110 /* RX DMA Order */
  28
  29/* Loongson I2S Control Register */
  30#define I2S_CTRL_MCLK_READY     BIT(16) /* MCLK ready */
  31#define I2S_CTRL_MASTER         BIT(15) /* Master mode */
  32#define I2S_CTRL_MSB            BIT(14) /* MSB bit order */
  33#define I2S_CTRL_RX_EN          BIT(13) /* RX enable */
  34#define I2S_CTRL_TX_EN          BIT(12) /* TX enable */
  35#define I2S_CTRL_RX_DMA_EN      BIT(11) /* DMA RX enable */
  36#define I2S_CTRL_CLK_READY      BIT(8)  /* BCLK ready */
  37#define I2S_CTRL_TX_DMA_EN      BIT(7)  /* DMA TX enable */
  38#define I2S_CTRL_RESET          BIT(4)  /* Controller soft reset */
  39#define I2S_CTRL_MCLK_EN        BIT(3)  /* Enable MCLK */
  40#define I2S_CTRL_RX_INT_EN      BIT(1)  /* RX interrupt enable */
  41#define I2S_CTRL_TX_INT_EN      BIT(0)  /* TX interrupt enable */
  42
  43#define LS_I2S_DRVNAME          "loongson-i2s"
  44
  45struct loongson_dma_data {
  46        dma_addr_t dev_addr;            /* device physical address for DMA */
  47        void __iomem *order_addr;       /* DMA order register */
  48        int irq;                        /* DMA irq */
  49};
  50
  51struct loongson_i2s {
  52        struct device *dev;
  53        union {
  54                struct snd_dmaengine_dai_dma_data playback_dma_data;
  55                struct loongson_dma_data tx_dma_data;
  56        };
  57        union {
  58                struct snd_dmaengine_dai_dma_data capture_dma_data;
  59                struct loongson_dma_data rx_dma_data;
  60        };
  61        struct regmap *regmap;
  62        void __iomem *reg_base;
  63        u32 rev_id;
  64        u32 clk_rate;
  65        u32 sysclk;
  66};
  67
  68extern const struct dev_pm_ops loongson_i2s_pm;
  69extern struct snd_soc_dai_driver loongson_i2s_dai;
  70
  71#endif
  72