1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2/* 3 * Copyright (c) 2018 BayLibre, SAS. 4 * Author: Jerome Brunet <jbrunet@baylibre.com> 5 */ 6 7#ifndef _MESON_AIU_H 8#define _MESON_AIU_H 9 10struct clk; 11struct clk_bulk_data; 12struct device; 13struct of_phandle_args; 14struct snd_soc_dai; 15struct snd_soc_dai_ops; 16 17enum aiu_clk_ids { 18 PCLK = 0, 19 AOCLK, 20 MCLK, 21 MIXER 22}; 23 24struct aiu_interface { 25 struct clk_bulk_data *clks; 26 unsigned int clk_num; 27 int irq; 28}; 29 30struct aiu_platform_data { 31 bool has_acodec; 32 bool has_clk_ctrl_more_i2s_div; 33}; 34 35struct aiu { 36 struct clk *pclk; 37 struct clk *spdif_mclk; 38 struct aiu_interface i2s; 39 struct aiu_interface spdif; 40 const struct aiu_platform_data *platform; 41}; 42 43#define AIU_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ 44 SNDRV_PCM_FMTBIT_S20_LE | \ 45 SNDRV_PCM_FMTBIT_S24_LE) 46 47int aiu_of_xlate_dai_name(struct snd_soc_component *component, 48 const struct of_phandle_args *args, 49 const char **dai_name, 50 unsigned int component_id); 51 52int aiu_hdmi_ctrl_register_component(struct device *dev); 53int aiu_acodec_ctrl_register_component(struct device *dev); 54 55int aiu_fifo_i2s_dai_probe(struct snd_soc_dai *dai); 56int aiu_fifo_spdif_dai_probe(struct snd_soc_dai *dai); 57 58extern const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops; 59extern const struct snd_soc_dai_ops aiu_fifo_spdif_dai_ops; 60extern const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops; 61extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops; 62 63#define AIU_IEC958_BPF 0x000 64#define AIU_958_MISC 0x010 65#define AIU_IEC958_DCU_FF_CTRL 0x01c 66#define AIU_958_CHSTAT_L0 0x020 67#define AIU_958_CHSTAT_L1 0x024 68#define AIU_958_CTRL 0x028 69#define AIU_I2S_SOURCE_DESC 0x034 70#define AIU_I2S_DAC_CFG 0x040 71#define AIU_I2S_SYNC 0x044 72#define AIU_I2S_MISC 0x048 73#define AIU_RST_SOFT 0x054 74#define AIU_CLK_CTRL 0x058 75#define AIU_CLK_CTRL_MORE 0x064 76#define AIU_CODEC_DAC_LRCLK_CTRL 0x0a0 77#define AIU_HDMI_CLK_DATA_CTRL 0x0a8 78#define AIU_ACODEC_CTRL 0x0b0 79#define AIU_958_CHSTAT_R0 0x0c0 80#define AIU_958_CHSTAT_R1 0x0c4 81#define AIU_MEM_I2S_START 0x180 82#define AIU_MEM_I2S_MASKS 0x18c 83#define AIU_MEM_I2S_CONTROL 0x190 84#define AIU_MEM_IEC958_START 0x194 85#define AIU_MEM_IEC958_CONTROL 0x1a4 86#define AIU_MEM_I2S_BUF_CNTL 0x1d8 87#define AIU_MEM_IEC958_BUF_CNTL 0x1fc 88 89#endif /* _MESON_AIU_H */ 90