LXR linux/sound/soc/sh/siu.h

   1// SPDX-License-Identifier: GPL-2.0+
   2//
   3// siu.h - ALSA SoC driver for Renesas SH7343, SH7722 SIU peripheral.
   4//
   5// Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
   6// Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>
   7
   8#ifndef SIU_H
   9#define SIU_H
  10
  11/* Common kernel and user-space firmware-building defines and types */
  12
  13#define YRAM0_SIZE              (0x0040 / 4)            /* 16 */
  14#define YRAM1_SIZE              (0x0080 / 4)            /* 32 */
  15#define YRAM2_SIZE              (0x0040 / 4)            /* 16 */
  16#define YRAM3_SIZE              (0x0080 / 4)            /* 32 */
  17#define YRAM4_SIZE              (0x0080 / 4)            /* 32 */
  18#define YRAM_DEF_SIZE           (YRAM0_SIZE + YRAM1_SIZE + YRAM2_SIZE + \
  19                                 YRAM3_SIZE + YRAM4_SIZE)
  20#define YRAM_FIR_SIZE           (0x0400 / 4)            /* 256 */
  21#define YRAM_IIR_SIZE           (0x0200 / 4)            /* 128 */
  22
  23#define XRAM0_SIZE              (0x0400 / 4)            /* 256 */
  24#define XRAM1_SIZE              (0x0200 / 4)            /* 128 */
  25#define XRAM2_SIZE              (0x0200 / 4)            /* 128 */
  26
  27/* PRAM program array size */
  28#define PRAM0_SIZE              (0x0100 / 4)            /* 64 */
  29#define PRAM1_SIZE              ((0x2000 - 0x0100) / 4) /* 1984 */
  30
  31#include <linux/types.h>
  32
  33struct siu_spb_param {
  34        __u32   ab1a;   /* input FIFO address */
  35        __u32   ab0a;   /* output FIFO address */
  36        __u32   dir;    /* 0=the ather except CPUOUTPUT, 1=CPUINPUT */
  37        __u32   event;  /* SPB program starting conditions */
  38        __u32   stfifo; /* STFIFO register setting value */
  39        __u32   trdat;  /* TRDAT register setting value */
  40};
  41
  42struct siu_firmware {
  43        __u32                   yram_fir_coeff[YRAM_FIR_SIZE];
  44        __u32                   pram0[PRAM0_SIZE];
  45        __u32                   pram1[PRAM1_SIZE];
  46        __u32                   yram0[YRAM0_SIZE];
  47        __u32                   yram1[YRAM1_SIZE];
  48        __u32                   yram2[YRAM2_SIZE];
  49        __u32                   yram3[YRAM3_SIZE];
  50        __u32                   yram4[YRAM4_SIZE];
  51        __u32                   spbpar_num;
  52        struct siu_spb_param    spbpar[32];
  53};
  54
  55#ifdef __KERNEL__
  56
  57#include <linux/dmaengine.h>
  58#include <linux/interrupt.h>
  59#include <linux/io.h>
  60#include <linux/sh_dma.h>
  61
  62#include <sound/core.h>
  63#include <sound/pcm.h>
  64#include <sound/soc.h>
  65
  66#define SIU_PERIOD_BYTES_MAX    8192            /* DMA transfer/period size */
  67#define SIU_PERIOD_BYTES_MIN    256             /* DMA transfer/period size */
  68#define SIU_PERIODS_MAX         64              /* Max periods in buffer */
  69#define SIU_PERIODS_MIN         4               /* Min periods in buffer */
  70#define SIU_BUFFER_BYTES_MAX    (SIU_PERIOD_BYTES_MAX * SIU_PERIODS_MAX)
  71
  72/* SIU ports: only one can be used at a time */
  73enum {
  74        SIU_PORT_A,
  75        SIU_PORT_B,
  76        SIU_PORT_NUM,
  77};
  78
  79/* SIU clock configuration */
  80enum {
  81        SIU_CLKA_PLL,
  82        SIU_CLKA_EXT,
  83        SIU_CLKB_PLL,
  84        SIU_CLKB_EXT
  85};
  86
  87struct device;
  88struct siu_info {
  89        struct device           *dev;
  90        int                     port_id;
  91        u32 __iomem             *pram;
  92        u32 __iomem             *xram;
  93        u32 __iomem             *yram;
  94        u32 __iomem             *reg;
  95        struct siu_firmware     fw;
  96};
  97
  98struct siu_stream {
  99        struct work_struct              work;
 100        struct snd_pcm_substream        *substream;
 101        snd_pcm_format_t                format;
 102        size_t                          buf_bytes;
 103        size_t                          period_bytes;
 104        int                             cur_period;     /* Period currently in dma */
 105        u32                             volume;
 106        snd_pcm_sframes_t               xfer_cnt;       /* Number of frames */
 107        u8                              rw_flg;         /* transfer status */
 108        /* DMA status */
 109        struct dma_chan                 *chan;          /* DMA channel */
 110        struct dma_async_tx_descriptor  *tx_desc;
 111        dma_cookie_t                    cookie;
 112        struct sh_dmae_slave            param;
 113};
 114
 115struct siu_port {
 116        unsigned long           play_cap;       /* Used to track full duplex */
 117        struct snd_pcm          *pcm;
 118        struct siu_stream       playback;
 119        struct siu_stream       capture;
 120        u32                     stfifo;         /* STFIFO value from firmware */
 121        u32                     trdat;          /* TRDAT value from firmware */
 122};
 123
 124extern struct siu_port *siu_ports[SIU_PORT_NUM];
 125
 126static inline struct siu_port *siu_port_info(struct snd_pcm_substream *substream)
 127{
 128        struct platform_device *pdev =
 129                to_platform_device(substream->pcm->card->dev);
 130        return siu_ports[pdev->id];
 131}
 132
 133/* Register access */
 134static inline void siu_write32(u32 __iomem *addr, u32 val)
 135{
 136        __raw_writel(val, addr);
 137}
 138
 139static inline u32 siu_read32(u32 __iomem *addr)
 140{
 141        return __raw_readl(addr);
 142}
 143
 144/* SIU registers */
 145#define SIU_IFCTL       (0x000 / sizeof(u32))
 146#define SIU_SRCTL       (0x004 / sizeof(u32))
 147#define SIU_SFORM       (0x008 / sizeof(u32))
 148#define SIU_CKCTL       (0x00c / sizeof(u32))
 149#define SIU_TRDAT       (0x010 / sizeof(u32))
 150#define SIU_STFIFO      (0x014 / sizeof(u32))
 151#define SIU_DPAK        (0x01c / sizeof(u32))
 152#define SIU_CKREV       (0x020 / sizeof(u32))
 153#define SIU_EVNTC       (0x028 / sizeof(u32))
 154#define SIU_SBCTL       (0x040 / sizeof(u32))
 155#define SIU_SBPSET      (0x044 / sizeof(u32))
 156#define SIU_SBFSTS      (0x068 / sizeof(u32))
 157#define SIU_SBDVCA      (0x06c / sizeof(u32))
 158#define SIU_SBDVCB      (0x070 / sizeof(u32))
 159#define SIU_SBACTIV     (0x074 / sizeof(u32))
 160#define SIU_DMAIA       (0x090 / sizeof(u32))
 161#define SIU_DMAIB       (0x094 / sizeof(u32))
 162#define SIU_DMAOA       (0x098 / sizeof(u32))
 163#define SIU_DMAOB       (0x09c / sizeof(u32))
 164#define SIU_DMAML       (0x0a0 / sizeof(u32))
 165#define SIU_SPSTS       (0x0cc / sizeof(u32))
 166#define SIU_SPCTL       (0x0d0 / sizeof(u32))
 167#define SIU_BRGASEL     (0x100 / sizeof(u32))
 168#define SIU_BRRA        (0x104 / sizeof(u32))
 169#define SIU_BRGBSEL     (0x108 / sizeof(u32))
 170#define SIU_BRRB        (0x10c / sizeof(u32))
 171
 172extern const struct snd_soc_component_driver siu_component;
 173extern struct siu_info *siu_i2s_data;
 174
 175int siu_init_port(int port, struct siu_port **port_info, struct snd_card *card);
 176void siu_free_port(struct siu_port *port_info);
 177
 178#endif
 179
 180#endif /* SIU_H */
 181