linux/sound/soc/sof/intel/pci-tng.c
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   1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2//
   3// This file is provided under a dual BSD/GPLv2 license.  When using or
   4// redistributing this file, you may do so under either license.
   5//
   6// Copyright(c) 2018-2021 Intel Corporation. All rights reserved.
   7//
   8// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
   9//
  10
  11#include <linux/module.h>
  12#include <linux/pci.h>
  13#include <sound/soc-acpi.h>
  14#include <sound/soc-acpi-intel-match.h>
  15#include <sound/sof.h>
  16#include "../ops.h"
  17#include "atom.h"
  18#include "../sof-pci-dev.h"
  19#include "../sof-audio.h"
  20
  21/* platform specific devices */
  22#include "shim.h"
  23
  24static struct snd_soc_acpi_mach sof_tng_machines[] = {
  25        {
  26                .id = "INT343A",
  27                .drv_name = "edison",
  28                .sof_fw_filename = "sof-byt.ri",
  29                .sof_tplg_filename = "sof-byt.tplg",
  30        },
  31        {}
  32};
  33
  34static const struct snd_sof_debugfs_map tng_debugfs[] = {
  35        {"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
  36         SOF_DEBUGFS_ACCESS_ALWAYS},
  37        {"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
  38         SOF_DEBUGFS_ACCESS_ALWAYS},
  39        {"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
  40         SOF_DEBUGFS_ACCESS_ALWAYS},
  41        {"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
  42         SOF_DEBUGFS_ACCESS_ALWAYS},
  43        {"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
  44         SOF_DEBUGFS_ACCESS_ALWAYS},
  45        {"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
  46         SOF_DEBUGFS_ACCESS_D0_ONLY},
  47        {"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
  48         SOF_DEBUGFS_ACCESS_D0_ONLY},
  49        {"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
  50         SOF_DEBUGFS_ACCESS_ALWAYS},
  51};
  52
  53static int tangier_pci_probe(struct snd_sof_dev *sdev)
  54{
  55        struct snd_sof_pdata *pdata = sdev->pdata;
  56        const struct sof_dev_desc *desc = pdata->desc;
  57        struct pci_dev *pci = to_pci_dev(sdev->dev);
  58        u32 base, size;
  59        int ret;
  60
  61        /* DSP DMA can only access low 31 bits of host memory */
  62        ret = dma_coerce_mask_and_coherent(&pci->dev, DMA_BIT_MASK(31));
  63        if (ret < 0) {
  64                dev_err(sdev->dev, "error: failed to set DMA mask %d\n", ret);
  65                return ret;
  66        }
  67
  68        /* LPE base */
  69        base = pci_resource_start(pci, desc->resindex_lpe_base) - IRAM_OFFSET;
  70        size = PCI_BAR_SIZE;
  71
  72        dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size);
  73        sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size);
  74        if (!sdev->bar[DSP_BAR]) {
  75                dev_err(sdev->dev, "error: failed to ioremap LPE base 0x%x size 0x%x\n",
  76                        base, size);
  77                return -ENODEV;
  78        }
  79        dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]);
  80
  81        /* IMR base - optional */
  82        if (desc->resindex_imr_base == -1)
  83                goto irq;
  84
  85        base = pci_resource_start(pci, desc->resindex_imr_base);
  86        size = pci_resource_len(pci, desc->resindex_imr_base);
  87
  88        /* some BIOSes don't map IMR */
  89        if (base == 0x55aa55aa || base == 0x0) {
  90                dev_info(sdev->dev, "IMR not set by BIOS. Ignoring\n");
  91                goto irq;
  92        }
  93
  94        dev_dbg(sdev->dev, "IMR base at 0x%x size 0x%x", base, size);
  95        sdev->bar[IMR_BAR] = devm_ioremap(sdev->dev, base, size);
  96        if (!sdev->bar[IMR_BAR]) {
  97                dev_err(sdev->dev, "error: failed to ioremap IMR base 0x%x size 0x%x\n",
  98                        base, size);
  99                return -ENODEV;
 100        }
 101        dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[IMR_BAR]);
 102
 103irq:
 104        /* register our IRQ */
 105        sdev->ipc_irq = pci->irq;
 106        dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq);
 107        ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq,
 108                                        atom_irq_handler, atom_irq_thread,
 109                                        0, "AudioDSP", sdev);
 110        if (ret < 0) {
 111                dev_err(sdev->dev, "error: failed to register IRQ %d\n",
 112                        sdev->ipc_irq);
 113                return ret;
 114        }
 115
 116        /* enable BUSY and disable DONE Interrupt by default */
 117        snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
 118                                  SHIM_IMRX_BUSY | SHIM_IMRX_DONE,
 119                                  SHIM_IMRX_DONE);
 120
 121        /* set default mailbox offset for FW ready message */
 122        sdev->dsp_box.offset = MBOX_OFFSET;
 123
 124        return ret;
 125}
 126
 127const struct snd_sof_dsp_ops sof_tng_ops = {
 128        /* device init */
 129        .probe          = tangier_pci_probe,
 130
 131        /* DSP core boot / reset */
 132        .run            = atom_run,
 133        .reset          = atom_reset,
 134
 135        /* Register IO */
 136        .write          = sof_io_write,
 137        .read           = sof_io_read,
 138        .write64        = sof_io_write64,
 139        .read64         = sof_io_read64,
 140
 141        /* Block IO */
 142        .block_read     = sof_block_read,
 143        .block_write    = sof_block_write,
 144
 145        /* doorbell */
 146        .irq_handler    = atom_irq_handler,
 147        .irq_thread     = atom_irq_thread,
 148
 149        /* ipc */
 150        .send_msg       = atom_send_msg,
 151        .fw_ready       = sof_fw_ready,
 152        .get_mailbox_offset = atom_get_mailbox_offset,
 153        .get_window_offset = atom_get_window_offset,
 154
 155        .ipc_msg_data   = intel_ipc_msg_data,
 156        .ipc_pcm_params = intel_ipc_pcm_params,
 157
 158        /* machine driver */
 159        .machine_select = atom_machine_select,
 160        .machine_register = sof_machine_register,
 161        .machine_unregister = sof_machine_unregister,
 162        .set_mach_params = atom_set_mach_params,
 163
 164        /* debug */
 165        .debug_map      = tng_debugfs,
 166        .debug_map_count        = ARRAY_SIZE(tng_debugfs),
 167        .dbg_dump       = atom_dump,
 168
 169        /* stream callbacks */
 170        .pcm_open       = intel_pcm_open,
 171        .pcm_close      = intel_pcm_close,
 172
 173        /* module loading */
 174        .load_module    = snd_sof_parse_module_memcpy,
 175
 176        /*Firmware loading */
 177        .load_firmware  = snd_sof_load_firmware_memcpy,
 178
 179        /* DAI drivers */
 180        .drv = atom_dai,
 181        .num_drv = 3, /* we have only 3 SSPs on byt*/
 182
 183        /* ALSA HW info flags */
 184        .hw_info =      SNDRV_PCM_INFO_MMAP |
 185                        SNDRV_PCM_INFO_MMAP_VALID |
 186                        SNDRV_PCM_INFO_INTERLEAVED |
 187                        SNDRV_PCM_INFO_PAUSE |
 188                        SNDRV_PCM_INFO_BATCH,
 189
 190        .arch_ops = &sof_xtensa_arch_ops,
 191};
 192
 193const struct sof_intel_dsp_desc tng_chip_info = {
 194        .cores_num = 1,
 195        .host_managed_cores_mask = 1,
 196};
 197
 198static const struct sof_dev_desc tng_desc = {
 199        .machines               = sof_tng_machines,
 200        .resindex_lpe_base      = 3,    /* IRAM, but subtract IRAM offset */
 201        .resindex_pcicfg_base   = -1,
 202        .resindex_imr_base      = 0,
 203        .irqindex_host_ipc      = -1,
 204        .resindex_dma_base      = -1,
 205        .chip_info = &tng_chip_info,
 206        .default_fw_path = "intel/sof",
 207        .default_tplg_path = "intel/sof-tplg",
 208        .default_fw_filename = "sof-byt.ri",
 209        .nocodec_tplg_filename = "sof-byt.tplg",
 210        .ops = &sof_tng_ops,
 211};
 212
 213/* PCI IDs */
 214static const struct pci_device_id sof_pci_ids[] = {
 215        { PCI_DEVICE(0x8086, 0x119a),
 216                .driver_data = (unsigned long)&tng_desc},
 217        { 0, }
 218};
 219MODULE_DEVICE_TABLE(pci, sof_pci_ids);
 220
 221/* pci_driver definition */
 222static struct pci_driver snd_sof_pci_intel_tng_driver = {
 223        .name = "sof-audio-pci-intel-tng",
 224        .id_table = sof_pci_ids,
 225        .probe = sof_pci_probe,
 226        .remove = sof_pci_remove,
 227        .shutdown = sof_pci_shutdown,
 228        .driver = {
 229                .pm = &sof_pci_pm,
 230        },
 231};
 232module_pci_driver(snd_sof_pci_intel_tng_driver);
 233
 234MODULE_LICENSE("Dual BSD/GPL");
 235MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HIFI_EP_IPC);
 236MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
 237MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
 238MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_ATOM_HIFI_EP);
 239