LXR linux/tools/testing/selftests/kvm/include/x86

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * tools/testing/selftests/kvm/include/x86_64/apic.h
   4 *
   5 * Copyright (C) 2021, Google LLC.
   6 */
   7
   8#ifndef SELFTEST_KVM_APIC_H
   9#define SELFTEST_KVM_APIC_H
  10
  11#include <stdint.h>
  12
  13#include "processor.h"
  14
  15#define APIC_DEFAULT_GPA                0xfee00000ULL
  16
  17/* APIC base address MSR and fields */
  18#define MSR_IA32_APICBASE               0x0000001b
  19#define MSR_IA32_APICBASE_BSP           (1<<8)
  20#define MSR_IA32_APICBASE_EXTD          (1<<10)
  21#define MSR_IA32_APICBASE_ENABLE        (1<<11)
  22#define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
  23#define         GET_APIC_BASE(x)        (((x) >> 12) << 12)
  24
  25#define APIC_BASE_MSR   0x800
  26#define X2APIC_ENABLE   (1UL << 10)
  27#define APIC_ID         0x20
  28#define APIC_LVR        0x30
  29#define         GET_APIC_ID_FIELD(x)    (((x) >> 24) & 0xFF)
  30#define APIC_TASKPRI    0x80
  31#define APIC_PROCPRI    0xA0
  32#define APIC_EOI        0xB0
  33#define APIC_SPIV       0xF0
  34#define         APIC_SPIV_FOCUS_DISABLED        (1 << 9)
  35#define         APIC_SPIV_APIC_ENABLED          (1 << 8)
  36#define APIC_ICR        0x300
  37#define         APIC_DEST_SELF          0x40000
  38#define         APIC_DEST_ALLINC        0x80000
  39#define         APIC_DEST_ALLBUT        0xC0000
  40#define         APIC_ICR_RR_MASK        0x30000
  41#define         APIC_ICR_RR_INVALID     0x00000
  42#define         APIC_ICR_RR_INPROG      0x10000
  43#define         APIC_ICR_RR_VALID       0x20000
  44#define         APIC_INT_LEVELTRIG      0x08000
  45#define         APIC_INT_ASSERT         0x04000
  46#define         APIC_ICR_BUSY           0x01000
  47#define         APIC_DEST_LOGICAL       0x00800
  48#define         APIC_DEST_PHYSICAL      0x00000
  49#define         APIC_DM_FIXED           0x00000
  50#define         APIC_DM_FIXED_MASK      0x00700
  51#define         APIC_DM_LOWEST          0x00100
  52#define         APIC_DM_SMI             0x00200
  53#define         APIC_DM_REMRD           0x00300
  54#define         APIC_DM_NMI             0x00400
  55#define         APIC_DM_INIT            0x00500
  56#define         APIC_DM_STARTUP         0x00600
  57#define         APIC_DM_EXTINT          0x00700
  58#define         APIC_VECTOR_MASK        0x000FF
  59#define APIC_ICR2       0x310
  60#define         SET_APIC_DEST_FIELD(x)  ((x) << 24)
  61
  62void apic_disable(void);
  63void xapic_enable(void);
  64void x2apic_enable(void);
  65
  66static inline uint32_t get_bsp_flag(void)
  67{
  68        return rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_BSP;
  69}
  70
  71static inline uint32_t xapic_read_reg(unsigned int reg)
  72{
  73        return ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2];
  74}
  75
  76static inline void xapic_write_reg(unsigned int reg, uint32_t val)
  77{
  78        ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;
  79}
  80
  81static inline uint64_t x2apic_read_reg(unsigned int reg)
  82{
  83        return rdmsr(APIC_BASE_MSR + (reg >> 4));
  84}
  85
  86static inline void x2apic_write_reg(unsigned int reg, uint64_t value)
  87{
  88        wrmsr(APIC_BASE_MSR + (reg >> 4), value);
  89}
  90
  91#endif /* SELFTEST_KVM_APIC_H */
  92