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10#include "hw.h"
11#include "mips.h"
12#include "pc.h"
13#include "isa.h"
14#include "net.h"
15#include "sysemu.h"
16#include "boards.h"
17#include "flash.h"
18#include "qemu-log.h"
19
20#ifdef TARGET_WORDS_BIGENDIAN
21#define BIOS_FILENAME "mips_bios.bin"
22#else
23#define BIOS_FILENAME "mipsel_bios.bin"
24#endif
25
26#define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
27
28#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
29
30#define MAX_IDE_BUS 2
31
32static const int ide_iobase[2] = { 0x1f0, 0x170 };
33static const int ide_iobase2[2] = { 0x3f6, 0x376 };
34static const int ide_irq[2] = { 14, 15 };
35
36static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
37static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
38
39static PITState *pit;
40
41
42
43static struct _loaderparams {
44 int ram_size;
45 const char *kernel_filename;
46 const char *kernel_cmdline;
47 const char *initrd_filename;
48} loaderparams;
49
50static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
51 uint32_t val)
52{
53 if ((addr & 0xffff) == 0 && val == 42)
54 qemu_system_reset_request ();
55 else if ((addr & 0xffff) == 4 && val == 42)
56 qemu_system_shutdown_request ();
57}
58
59static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
60{
61 return 0;
62}
63
64static CPUWriteMemoryFunc *mips_qemu_write[] = {
65 &mips_qemu_writel,
66 &mips_qemu_writel,
67 &mips_qemu_writel,
68};
69
70static CPUReadMemoryFunc *mips_qemu_read[] = {
71 &mips_qemu_readl,
72 &mips_qemu_readl,
73 &mips_qemu_readl,
74};
75
76static int mips_qemu_iomemtype = 0;
77
78static void load_kernel (CPUState *env)
79{
80 int64_t entry, kernel_low, kernel_high;
81 long kernel_size, initrd_size;
82 ram_addr_t initrd_offset;
83
84 kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
85 (uint64_t *)&entry, (uint64_t *)&kernel_low,
86 (uint64_t *)&kernel_high);
87 if (kernel_size >= 0) {
88 if ((entry & ~0x7fffffffULL) == 0x80000000)
89 entry = (int32_t)entry;
90 env->active_tc.PC = entry;
91 } else {
92 fprintf(stderr, "qemu: could not load kernel '%s'\n",
93 loaderparams.kernel_filename);
94 exit(1);
95 }
96
97
98 initrd_size = 0;
99 initrd_offset = 0;
100 if (loaderparams.initrd_filename) {
101 initrd_size = get_image_size (loaderparams.initrd_filename);
102 if (initrd_size > 0) {
103 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
104 if (initrd_offset + initrd_size > ram_size) {
105 fprintf(stderr,
106 "qemu: memory too small for initial ram disk '%s'\n",
107 loaderparams.initrd_filename);
108 exit(1);
109 }
110 initrd_size = load_image(loaderparams.initrd_filename,
111 phys_ram_base + initrd_offset);
112 }
113 if (initrd_size == (target_ulong) -1) {
114 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
115 loaderparams.initrd_filename);
116 exit(1);
117 }
118 }
119
120
121 if (initrd_size > 0) {
122 int ret;
123 ret = sprintf((char *)(phys_ram_base + (16 << 20) - 256),
124 "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
125 PHYS_TO_VIRT((uint32_t)initrd_offset),
126 initrd_size);
127 strcpy ((char *)(phys_ram_base + (16 << 20) - 256 + ret),
128 loaderparams.kernel_cmdline);
129 }
130 else {
131 strcpy ((char *)(phys_ram_base + (16 << 20) - 256),
132 loaderparams.kernel_cmdline);
133 }
134
135 *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
136 *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
137}
138
139static void main_cpu_reset(void *opaque)
140{
141 CPUState *env = opaque;
142 cpu_reset(env);
143
144 if (loaderparams.kernel_filename)
145 load_kernel (env);
146}
147
148static const int sector_len = 32 * 1024;
149static
150void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
151 const char *boot_device,
152 const char *kernel_filename, const char *kernel_cmdline,
153 const char *initrd_filename, const char *cpu_model)
154{
155 char buf[1024];
156 unsigned long bios_offset;
157 int bios_size;
158 CPUState *env;
159 RTCState *rtc_state;
160 int i;
161 qemu_irq *i8259;
162 int index;
163 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
164
165
166 if (cpu_model == NULL) {
167#ifdef TARGET_MIPS64
168 cpu_model = "R4000";
169#else
170 cpu_model = "24Kf";
171#endif
172 }
173 env = cpu_init(cpu_model);
174 if (!env) {
175 fprintf(stderr, "Unable to find CPU definition\n");
176 exit(1);
177 }
178 qemu_register_reset(main_cpu_reset, env);
179
180
181 if (ram_size > (256 << 20)) {
182 fprintf(stderr,
183 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
184 ((unsigned int)ram_size / (1 << 20)));
185 exit(1);
186 }
187 cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
188
189 if (!mips_qemu_iomemtype) {
190 mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
191 mips_qemu_write, NULL);
192 }
193 cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
194
195
196
197
198
199 bios_offset = ram_size + vga_ram_size;
200 if (bios_name == NULL)
201 bios_name = BIOS_FILENAME;
202 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
203 bios_size = load_image(buf, phys_ram_base + bios_offset);
204 if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
205 cpu_register_physical_memory(0x1fc00000,
206 BIOS_SIZE, bios_offset | IO_MEM_ROM);
207 } else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {
208 uint32_t mips_rom = 0x00400000;
209 cpu_register_physical_memory(0x1fc00000, mips_rom,
210 qemu_ram_alloc(mips_rom) | IO_MEM_ROM);
211 if (!pflash_cfi01_register(0x1fc00000, qemu_ram_alloc(mips_rom),
212 drives_table[index].bdrv, sector_len, mips_rom / sector_len,
213 4, 0, 0, 0, 0)) {
214 fprintf(stderr, "qemu: Error registering flash memory.\n");
215 }
216 }
217 else {
218
219 fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
220 buf);
221 }
222
223 if (kernel_filename) {
224 loaderparams.ram_size = ram_size;
225 loaderparams.kernel_filename = kernel_filename;
226 loaderparams.kernel_cmdline = kernel_cmdline;
227 loaderparams.initrd_filename = initrd_filename;
228 load_kernel (env);
229 }
230
231
232 cpu_mips_irq_init_cpu(env);
233 cpu_mips_clock_init(env);
234
235
236 i8259 = i8259_init(env->irq[2]);
237
238 rtc_state = rtc_init(0x70, i8259[8], 2000);
239
240
241 isa_mmio_init(0x14000000, 0x00010000);
242 isa_mem_base = 0x10000000;
243
244 pit = pit_init(0x40, i8259[0]);
245
246 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
247 if (serial_hds[i]) {
248 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
249 serial_hds[i]);
250 }
251 }
252
253 isa_vga_init(phys_ram_base + ram_size, ram_size,
254 vga_ram_size);
255
256 if (nd_table[0].vlan)
257 isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
258
259 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
260 fprintf(stderr, "qemu: too many IDE bus\n");
261 exit(1);
262 }
263
264 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
265 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
266 if (index != -1)
267 hd[i] = drives_table[index].bdrv;
268 else
269 hd[i] = NULL;
270 }
271
272 for(i = 0; i < MAX_IDE_BUS; i++)
273 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
274 hd[MAX_IDE_DEVS * i],
275 hd[MAX_IDE_DEVS * i + 1]);
276
277 i8042_init(i8259[1], i8259[12], 0x60);
278}
279
280QEMUMachine mips_machine = {
281 .name = "mips",
282 .desc = "mips r4k platform",
283 .init = mips_r4k_init,
284 .ram_require = VGA_RAM_SIZE + BIOS_SIZE,
285 .nodisk_ok = 1,
286};
287
