LXR qemu/hw/mainstone.c

   1/*
   2 * PXA270-based Intel Mainstone platforms.
   3 *
   4 * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
   5 *                                    <akuster@mvista.com>
   6 *
   7 * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
   8 *
   9 * This code is licensed under the GNU GPL v2.
  10 */
  11#include "hw.h"
  12#include "pxa.h"
  13#include "arm-misc.h"
  14#include "net.h"
  15#include "devices.h"
  16#include "boards.h"
  17#include "mainstone.h"
  18#include "sysemu.h"
  19#include "flash.h"
  20
  21static struct keymap map[0xE0] = {
  22    [0 ... 0xDF] = { -1, -1 },
  23    [0x1e] = {0,0}, /* a */
  24    [0x30] = {0,1}, /* b */
  25    [0x2e] = {0,2}, /* c */
  26    [0x20] = {0,3}, /* d */
  27    [0x12] = {0,4}, /* e */
  28    [0x21] = {0,5}, /* f */
  29    [0x22] = {1,0}, /* g */
  30    [0x23] = {1,1}, /* h */
  31    [0x17] = {1,2}, /* i */
  32    [0x24] = {1,3}, /* j */
  33    [0x25] = {1,4}, /* k */
  34    [0x26] = {1,5}, /* l */
  35    [0x32] = {2,0}, /* m */
  36    [0x31] = {2,1}, /* n */
  37    [0x18] = {2,2}, /* o */
  38    [0x19] = {2,3}, /* p */
  39    [0x10] = {2,4}, /* q */
  40    [0x13] = {2,5}, /* r */
  41    [0x1f] = {3,0}, /* s */
  42    [0x14] = {3,1}, /* t */
  43    [0x16] = {3,2}, /* u */
  44    [0x2f] = {3,3}, /* v */
  45    [0x11] = {3,4}, /* w */
  46    [0x2d] = {3,5}, /* x */
  47    [0x15] = {4,2}, /* y */
  48    [0x2c] = {4,3}, /* z */
  49    [0xc7] = {5,0}, /* Home */
  50    [0x2a] = {5,1}, /* shift */
  51    [0x39] = {5,2}, /* space */
  52    [0x39] = {5,3}, /* space */
  53    [0x1c] = {5,5}, /*  enter */
  54    [0xc8] = {6,0}, /* up */
  55    [0xd0] = {6,1}, /* down */
  56    [0xcb] = {6,2}, /* left */
  57    [0xcd] = {6,3}, /* right */
  58};
  59
  60enum mainstone_model_e { mainstone };
  61
  62#define MAINSTONE_RAM   0x04000000
  63#define MAINSTONE_ROM   0x00800000
  64#define MAINSTONE_FLASH 0x02000000
  65
  66static struct arm_boot_info mainstone_binfo = {
  67    .loader_start = PXA2XX_SDRAM_BASE,
  68    .ram_size = 0x04000000,
  69};
  70
  71static void mainstone_common_init(ram_addr_t ram_size,
  72                const char *kernel_filename,
  73                const char *kernel_cmdline, const char *initrd_filename,
  74                const char *cpu_model, enum mainstone_model_e model, int arm_id)
  75{
  76    uint32_t sector_len = 256 * 1024;
  77    target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
  78    PXA2xxState *cpu;
  79    qemu_irq *mst_irq;
  80    DriveInfo *dinfo;
  81    int i;
  82
  83    if (!cpu_model)
  84        cpu_model = "pxa270-c5";
  85
  86    /* Setup CPU & memory */
  87    cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
  88    cpu_register_physical_memory(0, MAINSTONE_ROM,
  89                    qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
  90
  91    /* Setup initial (reset) machine state */
  92    cpu->env->regs[15] = mainstone_binfo.loader_start;
  93
  94    /* There are two 32MiB flash devices on the board */
  95    for (i = 0; i < 2; i ++) {
  96        dinfo = drive_get(IF_PFLASH, 0, i);
  97        if (!dinfo) {
  98            fprintf(stderr, "Two flash images must be given with the "
  99                    "'pflash' parameter\n");
 100            exit(1);
 101        }
 102
 103        if (!pflash_cfi01_register(mainstone_flash_base[i],
 104                                qemu_ram_alloc(MAINSTONE_FLASH),
 105                                dinfo->bdrv, sector_len,
 106                                MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) {
 107            fprintf(stderr, "qemu: Error registering flash memory.\n");
 108            exit(1);
 109        }
 110    }
 111
 112    mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
 113
 114    /* setup keypad */
 115    printf("map addr %p\n", &map);
 116    pxa27x_register_keypad(cpu->kp, map, 0xe0);
 117
 118    /* MMC/SD host */
 119    pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]);
 120
 121    smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
 122
 123    mainstone_binfo.kernel_filename = kernel_filename;
 124    mainstone_binfo.kernel_cmdline = kernel_cmdline;
 125    mainstone_binfo.initrd_filename = initrd_filename;
 126    mainstone_binfo.board_id = arm_id;
 127    arm_load_kernel(cpu->env, &mainstone_binfo);
 128}
 129
 130static void mainstone_init(ram_addr_t ram_size,
 131                const char *boot_device,
 132                const char *kernel_filename, const char *kernel_cmdline,
 133                const char *initrd_filename, const char *cpu_model)
 134{
 135    mainstone_common_init(ram_size, kernel_filename,
 136                kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
 137}
 138
 139static QEMUMachine mainstone2_machine = {
 140    .name = "mainstone",
 141    .desc = "Mainstone II (PXA27x)",
 142    .init = mainstone_init,
 143};
 144
 145static void mainstone_machine_init(void)
 146{
 147    qemu_register_machine(&mainstone2_machine);
 148}
 149
 150machine_init(mainstone_machine_init);
 151