LXR qemu/target-i386/exec.h

   1/*
   2 *  i386 execution defines
   3 *
   4 *  Copyright (c) 2003 Fabrice Bellard
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19#include "config.h"
  20#include "dyngen-exec.h"
  21
  22/* XXX: factorize this mess */
  23#ifdef TARGET_X86_64
  24#define TARGET_LONG_BITS 64
  25#else
  26#define TARGET_LONG_BITS 32
  27#endif
  28
  29#include "cpu-defs.h"
  30
  31register struct CPUX86State *env asm(AREG0);
  32
  33#include "qemu-common.h"
  34#include "qemu-log.h"
  35
  36#undef EAX
  37#define EAX (env->regs[R_EAX])
  38#undef ECX
  39#define ECX (env->regs[R_ECX])
  40#undef EDX
  41#define EDX (env->regs[R_EDX])
  42#undef EBX
  43#define EBX (env->regs[R_EBX])
  44#undef ESP
  45#define ESP (env->regs[R_ESP])
  46#undef EBP
  47#define EBP (env->regs[R_EBP])
  48#undef ESI
  49#define ESI (env->regs[R_ESI])
  50#undef EDI
  51#define EDI (env->regs[R_EDI])
  52#undef EIP
  53#define EIP (env->eip)
  54#define DF  (env->df)
  55
  56#define CC_SRC (env->cc_src)
  57#define CC_DST (env->cc_dst)
  58#define CC_OP  (env->cc_op)
  59
  60/* float macros */
  61#define FT0    (env->ft0)
  62#define ST0    (env->fpregs[env->fpstt].d)
  63#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
  64#define ST1    ST(1)
  65
  66#include "cpu.h"
  67#include "exec-all.h"
  68
  69/* op_helper.c */
  70void do_interrupt(int intno, int is_int, int error_code,
  71                  target_ulong next_eip, int is_hw);
  72void do_interrupt_user(int intno, int is_int, int error_code,
  73                       target_ulong next_eip);
  74void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
  75void QEMU_NORETURN raise_exception(int exception_index);
  76void do_smm_enter(void);
  77
  78/* n must be a constant to be efficient */
  79static inline target_long lshift(target_long x, int n)
  80{
  81    if (n >= 0)
  82        return x << n;
  83    else
  84        return x >> (-n);
  85}
  86
  87#include "helper.h"
  88
  89static inline void svm_check_intercept(uint32_t type)
  90{
  91    helper_svm_check_intercept_param(type, 0);
  92}
  93
  94#if !defined(CONFIG_USER_ONLY)
  95
  96#include "softmmu_exec.h"
  97
  98#endif /* !defined(CONFIG_USER_ONLY) */
  99
 100#ifdef USE_X86LDOUBLE
 101/* use long double functions */
 102#define floatx_to_int32 floatx80_to_int32
 103#define floatx_to_int64 floatx80_to_int64
 104#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
 105#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
 106#define int32_to_floatx int32_to_floatx80
 107#define int64_to_floatx int64_to_floatx80
 108#define float32_to_floatx float32_to_floatx80
 109#define float64_to_floatx float64_to_floatx80
 110#define floatx_to_float32 floatx80_to_float32
 111#define floatx_to_float64 floatx80_to_float64
 112#define floatx_abs floatx80_abs
 113#define floatx_chs floatx80_chs
 114#define floatx_round_to_int floatx80_round_to_int
 115#define floatx_compare floatx80_compare
 116#define floatx_compare_quiet floatx80_compare_quiet
 117#else
 118#define floatx_to_int32 float64_to_int32
 119#define floatx_to_int64 float64_to_int64
 120#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
 121#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
 122#define int32_to_floatx int32_to_float64
 123#define int64_to_floatx int64_to_float64
 124#define float32_to_floatx float32_to_float64
 125#define float64_to_floatx(x, e) (x)
 126#define floatx_to_float32 float64_to_float32
 127#define floatx_to_float64(x, e) (x)
 128#define floatx_abs float64_abs
 129#define floatx_chs float64_chs
 130#define floatx_round_to_int float64_round_to_int
 131#define floatx_compare float64_compare
 132#define floatx_compare_quiet float64_compare_quiet
 133#endif
 134
 135#define RC_MASK         0xc00
 136#define RC_NEAR         0x000
 137#define RC_DOWN         0x400
 138#define RC_UP           0x800
 139#define RC_CHOP         0xc00
 140
 141#define MAXTAN 9223372036854775808.0
 142
 143#ifdef USE_X86LDOUBLE
 144
 145/* only for x86 */
 146typedef union {
 147    long double d;
 148    struct {
 149        unsigned long long lower;
 150        unsigned short upper;
 151    } l;
 152} CPU86_LDoubleU;
 153
 154/* the following deal with x86 long double-precision numbers */
 155#define MAXEXPD 0x7fff
 156#define EXPBIAS 16383
 157#define EXPD(fp)        (fp.l.upper & 0x7fff)
 158#define SIGND(fp)       ((fp.l.upper) & 0x8000)
 159#define MANTD(fp)       (fp.l.lower)
 160#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 161
 162#else
 163
 164/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
 165typedef union {
 166    double d;
 167#if !defined(HOST_WORDS_BIGENDIAN) && !defined(__arm__)
 168    struct {
 169        uint32_t lower;
 170        int32_t upper;
 171    } l;
 172#else
 173    struct {
 174        int32_t upper;
 175        uint32_t lower;
 176    } l;
 177#endif
 178#ifndef __arm__
 179    int64_t ll;
 180#endif
 181} CPU86_LDoubleU;
 182
 183/* the following deal with IEEE double-precision numbers */
 184#define MAXEXPD 0x7ff
 185#define EXPBIAS 1023
 186#define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
 187#define SIGND(fp)       ((fp.l.upper) & 0x80000000)
 188#ifdef __arm__
 189#define MANTD(fp)       (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
 190#else
 191#define MANTD(fp)       (fp.ll & ((1LL << 52) - 1))
 192#endif
 193#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
 194#endif
 195
 196static inline void fpush(void)
 197{
 198    env->fpstt = (env->fpstt - 1) & 7;
 199    env->fptags[env->fpstt] = 0; /* validate stack entry */
 200}
 201
 202static inline void fpop(void)
 203{
 204    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 205    env->fpstt = (env->fpstt + 1) & 7;
 206}
 207
 208#ifndef USE_X86LDOUBLE
 209static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 210{
 211    CPU86_LDoubleU temp;
 212    int upper, e;
 213    uint64_t ll;
 214
 215    /* mantissa */
 216    upper = lduw(ptr + 8);
 217    /* XXX: handle overflow ? */
 218    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
 219    e |= (upper >> 4) & 0x800; /* sign */
 220    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
 221#ifdef __arm__
 222    temp.l.upper = (e << 20) | (ll >> 32);
 223    temp.l.lower = ll;
 224#else
 225    temp.ll = ll | ((uint64_t)e << 52);
 226#endif
 227    return temp.d;
 228}
 229
 230static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 231{
 232    CPU86_LDoubleU temp;
 233    int e;
 234
 235    temp.d = f;
 236    /* mantissa */
 237    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
 238    /* exponent + sign */
 239    e = EXPD(temp) - EXPBIAS + 16383;
 240    e |= SIGND(temp) >> 16;
 241    stw(ptr + 8, e);
 242}
 243#else
 244
 245/* we use memory access macros */
 246
 247static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 248{
 249    CPU86_LDoubleU temp;
 250
 251    temp.l.lower = ldq(ptr);
 252    temp.l.upper = lduw(ptr + 8);
 253    return temp.d;
 254}
 255
 256static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 257{
 258    CPU86_LDoubleU temp;
 259
 260    temp.d = f;
 261    stq(ptr, temp.l.lower);
 262    stw(ptr + 8, temp.l.upper);
 263}
 264
 265#endif /* USE_X86LDOUBLE */
 266
 267#define FPUS_IE (1 << 0)
 268#define FPUS_DE (1 << 1)
 269#define FPUS_ZE (1 << 2)
 270#define FPUS_OE (1 << 3)
 271#define FPUS_UE (1 << 4)
 272#define FPUS_PE (1 << 5)
 273#define FPUS_SF (1 << 6)
 274#define FPUS_SE (1 << 7)
 275#define FPUS_B  (1 << 15)
 276
 277#define FPUC_EM 0x3f
 278
 279static inline uint32_t compute_eflags(void)
 280{
 281    return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
 282}
 283
 284/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 285static inline void load_eflags(int eflags, int update_mask)
 286{
 287    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 288    DF = 1 - (2 * ((eflags >> 10) & 1));
 289    env->eflags = (env->eflags & ~update_mask) |
 290        (eflags & update_mask) | 0x2;
 291}
 292
 293static inline void env_to_regs(void)
 294{
 295#ifdef reg_EAX
 296    EAX = env->regs[R_EAX];
 297#endif
 298#ifdef reg_ECX
 299    ECX = env->regs[R_ECX];
 300#endif
 301#ifdef reg_EDX
 302    EDX = env->regs[R_EDX];
 303#endif
 304#ifdef reg_EBX
 305    EBX = env->regs[R_EBX];
 306#endif
 307#ifdef reg_ESP
 308    ESP = env->regs[R_ESP];
 309#endif
 310#ifdef reg_EBP
 311    EBP = env->regs[R_EBP];
 312#endif
 313#ifdef reg_ESI
 314    ESI = env->regs[R_ESI];
 315#endif
 316#ifdef reg_EDI
 317    EDI = env->regs[R_EDI];
 318#endif
 319}
 320
 321static inline void regs_to_env(void)
 322{
 323#ifdef reg_EAX
 324    env->regs[R_EAX] = EAX;
 325#endif
 326#ifdef reg_ECX
 327    env->regs[R_ECX] = ECX;
 328#endif
 329#ifdef reg_EDX
 330    env->regs[R_EDX] = EDX;
 331#endif
 332#ifdef reg_EBX
 333    env->regs[R_EBX] = EBX;
 334#endif
 335#ifdef reg_ESP
 336    env->regs[R_ESP] = ESP;
 337#endif
 338#ifdef reg_EBP
 339    env->regs[R_EBP] = EBP;
 340#endif
 341#ifdef reg_ESI
 342    env->regs[R_ESI] = ESI;
 343#endif
 344#ifdef reg_EDI
 345    env->regs[R_EDI] = EDI;
 346#endif
 347}
 348
 349static inline int cpu_has_work(CPUState *env)
 350{
 351    int work;
 352
 353    work = (env->interrupt_request & CPU_INTERRUPT_HARD) &&
 354           (env->eflags & IF_MASK);
 355    work |= env->interrupt_request & CPU_INTERRUPT_NMI;
 356    work |= env->interrupt_request & CPU_INTERRUPT_INIT;
 357    work |= env->interrupt_request & CPU_INTERRUPT_SIPI;
 358
 359    return work;
 360}
 361
 362static inline int cpu_halted(CPUState *env) {
 363    /* handle exit of HALTED state */
 364    if (!env->halted)
 365        return 0;
 366    /* disable halt condition */
 367    if (cpu_has_work(env)) {
 368        env->halted = 0;
 369        return 0;
 370    }
 371    return EXCP_HALTED;
 372}
 373
 374/* load efer and update the corresponding hflags. XXX: do consistency
 375   checks with cpuid bits ? */
 376static inline void cpu_load_efer(CPUState *env, uint64_t val)
 377{
 378    env->efer = val;
 379    env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
 380    if (env->efer & MSR_EFER_LMA)
 381        env->hflags |= HF_LMA_MASK;
 382    if (env->efer & MSR_EFER_SVME)
 383        env->hflags |= HF_SVME_MASK;
 384}
 385