LXR qemu/hw/pc.h

   1#ifndef HW_PC_H
   2#define HW_PC_H
   3
   4#include "qemu-common.h"
   5#include "ioport.h"
   6#include "isa.h"
   7#include "fdc.h"
   8
   9/* PC-style peripherals (also used by other machines).  */
  10
  11/* serial.c */
  12
  13SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  14                         CharDriverState *chr);
  15SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  16                             qemu_irq irq, int baudbase,
  17                             CharDriverState *chr, int ioregister,
  18                             int be);
  19SerialState *serial_isa_init(int index, CharDriverState *chr);
  20void serial_set_frequency(SerialState *s, uint32_t frequency);
  21
  22/* parallel.c */
  23
  24typedef struct ParallelState ParallelState;
  25ParallelState *parallel_init(int index, CharDriverState *chr);
  26ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
  27
  28/* i8259.c */
  29
  30typedef struct PicState2 PicState2;
  31extern PicState2 *isa_pic;
  32void pic_set_irq(int irq, int level);
  33void pic_set_irq_new(void *opaque, int irq, int level);
  34qemu_irq *i8259_init(qemu_irq parent_irq);
  35int pic_read_irq(PicState2 *s);
  36void pic_update_irq(PicState2 *s);
  37uint32_t pic_intack_read(PicState2 *s);
  38void pic_info(Monitor *mon);
  39void irq_info(Monitor *mon);
  40
  41/* ISA */
  42#define IOAPIC_NUM_PINS 0x18
  43
  44typedef struct isa_irq_state {
  45    qemu_irq *i8259;
  46    qemu_irq ioapic[IOAPIC_NUM_PINS];
  47} IsaIrqState;
  48
  49void isa_irq_handler(void *opaque, int n, int level);
  50
  51/* i8254.c */
  52
  53#define PIT_FREQ 1193182
  54
  55typedef struct PITState PITState;
  56
  57PITState *pit_init(int base, qemu_irq irq);
  58void pit_set_gate(PITState *pit, int channel, int val);
  59int pit_get_gate(PITState *pit, int channel);
  60int pit_get_initial_count(PITState *pit, int channel);
  61int pit_get_mode(PITState *pit, int channel);
  62int pit_get_out(PITState *pit, int channel, int64_t current_time);
  63
  64void hpet_pit_disable(void);
  65void hpet_pit_enable(void);
  66
  67/* vmport.c */
  68void vmport_init(void);
  69void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  70
  71/* vmmouse.c */
  72void *vmmouse_init(void *m);
  73
  74/* pckbd.c */
  75
  76void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  77void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  78                   target_phys_addr_t base, ram_addr_t size,
  79                   target_phys_addr_t mask);
  80void i8042_isa_mouse_fake_event(void *opaque);
  81void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
  82
  83/* pc.c */
  84extern int fd_bootchk;
  85
  86void pc_register_ferr_irq(qemu_irq irq);
  87void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
  88void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
  89
  90void pc_cpus_init(const char *cpu_model);
  91void pc_memory_init(ram_addr_t ram_size,
  92                    const char *kernel_filename,
  93                    const char *kernel_cmdline,
  94                    const char *initrd_filename,
  95                    ram_addr_t *below_4g_mem_size_p,
  96                    ram_addr_t *above_4g_mem_size_p);
  97qemu_irq *pc_allocate_cpu_irq(void);
  98void pc_vga_init(PCIBus *pci_bus);
  99void pc_basic_device_init(qemu_irq *isa_irq,
 100                          FDCtrl **floppy_controller,
 101                          ISADevice **rtc_state);
 102void pc_init_ne2k_isa(NICInfo *nd);
 103#ifdef HAS_AUDIO
 104void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic);
 105#endif
 106void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 107                  const char *boot_device,
 108                  BusState *ide0, BusState *ide1,
 109                  FDCtrl *floppy_controller, ISADevice *s);
 110void pc_pci_device_init(PCIBus *pci_bus);
 111
 112typedef void (*cpu_set_smm_t)(int smm, void *arg);
 113void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 114
 115/* acpi.c */
 116extern int acpi_enabled;
 117extern char *acpi_tables;
 118extern size_t acpi_tables_len;
 119
 120void acpi_bios_init(void);
 121int acpi_table_add(const char *table_desc);
 122
 123/* acpi_piix.c */
 124
 125i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 126                       qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
 127                       int kvm_enabled);
 128void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 129
 130/* hpet.c */
 131extern int no_hpet;
 132
 133/* pcspk.c */
 134void pcspk_init(PITState *);
 135int pcspk_audio_init(qemu_irq *pic);
 136
 137/* piix_pci.c */
 138struct PCII440FXState;
 139typedef struct PCII440FXState PCII440FXState;
 140
 141PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
 142void i440fx_init_memory_mappings(PCII440FXState *d);
 143
 144/* piix4.c */
 145extern PCIDevice *piix4_dev;
 146int piix4_init(PCIBus *bus, int devfn);
 147
 148/* vga.c */
 149enum vga_retrace_method {
 150    VGA_RETRACE_DUMB,
 151    VGA_RETRACE_PRECISE
 152};
 153
 154extern enum vga_retrace_method vga_retrace_method;
 155
 156int isa_vga_init(void);
 157int pci_vga_init(PCIBus *bus,
 158                 unsigned long vga_bios_offset, int vga_bios_size);
 159int isa_vga_mm_init(target_phys_addr_t vram_base,
 160                    target_phys_addr_t ctrl_base, int it_shift);
 161
 162/* cirrus_vga.c */
 163void pci_cirrus_vga_init(PCIBus *bus);
 164void isa_cirrus_vga_init(void);
 165
 166/* ne2000.c */
 167
 168void isa_ne2000_init(int base, int irq, NICInfo *nd);
 169
 170/* e820 types */
 171#define E820_RAM        1
 172#define E820_RESERVED   2
 173#define E820_ACPI       3
 174#define E820_NVS        4
 175#define E820_UNUSABLE   5
 176
 177int e820_add_entry(uint64_t, uint64_t, uint32_t);
 178
 179#endif
 180