1#if !defined(__OPENPIC_H__) 2#define __OPENPIC_H__ 3 4/* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */ 5enum { 6 OPENPIC_OUTPUT_INT = 0, /* IRQ */ 7 OPENPIC_OUTPUT_CINT, /* critical IRQ */ 8 OPENPIC_OUTPUT_MCK, /* Machine check event */ 9 OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */ 10 OPENPIC_OUTPUT_RESET, /* Core reset event */ 11 OPENPIC_OUTPUT_NB, 12}; 13 14qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, 15 qemu_irq **irqs, qemu_irq irq_out); 16qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus, 17 qemu_irq **irqs, qemu_irq irq_out); 18#endif /* __OPENPIC_H__ */ 19