qemu/hw/pckbd.c
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   1/*
   2 * QEMU PC keyboard emulation
   3 *
   4 * Copyright (c) 2003 Fabrice Bellard
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24#include "hw.h"
  25#include "isa.h"
  26#include "pc.h"
  27#include "ps2.h"
  28#include "sysemu.h"
  29
  30/* debug PC keyboard */
  31//#define DEBUG_KBD
  32#ifdef DEBUG_KBD
  33#define DPRINTF(fmt, ...)                                       \
  34    do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0)
  35#else
  36#define DPRINTF(fmt, ...)
  37#endif
  38
  39/*      Keyboard Controller Commands */
  40#define KBD_CCMD_READ_MODE      0x20    /* Read mode bits */
  41#define KBD_CCMD_WRITE_MODE     0x60    /* Write mode bits */
  42#define KBD_CCMD_GET_VERSION    0xA1    /* Get controller version */
  43#define KBD_CCMD_MOUSE_DISABLE  0xA7    /* Disable mouse interface */
  44#define KBD_CCMD_MOUSE_ENABLE   0xA8    /* Enable mouse interface */
  45#define KBD_CCMD_TEST_MOUSE     0xA9    /* Mouse interface test */
  46#define KBD_CCMD_SELF_TEST      0xAA    /* Controller self test */
  47#define KBD_CCMD_KBD_TEST       0xAB    /* Keyboard interface test */
  48#define KBD_CCMD_KBD_DISABLE    0xAD    /* Keyboard interface disable */
  49#define KBD_CCMD_KBD_ENABLE     0xAE    /* Keyboard interface enable */
  50#define KBD_CCMD_READ_INPORT    0xC0    /* read input port */
  51#define KBD_CCMD_READ_OUTPORT   0xD0    /* read output port */
  52#define KBD_CCMD_WRITE_OUTPORT  0xD1    /* write output port */
  53#define KBD_CCMD_WRITE_OBUF     0xD2
  54#define KBD_CCMD_WRITE_AUX_OBUF 0xD3    /* Write to output buffer as if
  55                                           initiated by the auxiliary device */
  56#define KBD_CCMD_WRITE_MOUSE    0xD4    /* Write the following byte to the mouse */
  57#define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
  58#define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
  59#define KBD_CCMD_PULSE_BITS_3_0 0xF0    /* Pulse bits 3-0 of the output port P2. */
  60#define KBD_CCMD_RESET          0xFE    /* Pulse bit 0 of the output port P2 = CPU reset. */
  61#define KBD_CCMD_NO_OP          0xFF    /* Pulse no bits of the output port P2. */
  62
  63/* Keyboard Commands */
  64#define KBD_CMD_SET_LEDS        0xED    /* Set keyboard leds */
  65#define KBD_CMD_ECHO            0xEE
  66#define KBD_CMD_GET_ID          0xF2    /* get keyboard ID */
  67#define KBD_CMD_SET_RATE        0xF3    /* Set typematic rate */
  68#define KBD_CMD_ENABLE          0xF4    /* Enable scanning */
  69#define KBD_CMD_RESET_DISABLE   0xF5    /* reset and disable scanning */
  70#define KBD_CMD_RESET_ENABLE    0xF6    /* reset and enable scanning */
  71#define KBD_CMD_RESET           0xFF    /* Reset */
  72
  73/* Keyboard Replies */
  74#define KBD_REPLY_POR           0xAA    /* Power on reset */
  75#define KBD_REPLY_ACK           0xFA    /* Command ACK */
  76#define KBD_REPLY_RESEND        0xFE    /* Command NACK, send the cmd again */
  77
  78/* Status Register Bits */
  79#define KBD_STAT_OBF            0x01    /* Keyboard output buffer full */
  80#define KBD_STAT_IBF            0x02    /* Keyboard input buffer full */
  81#define KBD_STAT_SELFTEST       0x04    /* Self test successful */
  82#define KBD_STAT_CMD            0x08    /* Last write was a command write (0=data) */
  83#define KBD_STAT_UNLOCKED       0x10    /* Zero if keyboard locked */
  84#define KBD_STAT_MOUSE_OBF      0x20    /* Mouse output buffer full */
  85#define KBD_STAT_GTO            0x40    /* General receive/xmit timeout */
  86#define KBD_STAT_PERR           0x80    /* Parity error */
  87
  88/* Controller Mode Register Bits */
  89#define KBD_MODE_KBD_INT        0x01    /* Keyboard data generate IRQ1 */
  90#define KBD_MODE_MOUSE_INT      0x02    /* Mouse data generate IRQ12 */
  91#define KBD_MODE_SYS            0x04    /* The system flag (?) */
  92#define KBD_MODE_NO_KEYLOCK     0x08    /* The keylock doesn't affect the keyboard if set */
  93#define KBD_MODE_DISABLE_KBD    0x10    /* Disable keyboard interface */
  94#define KBD_MODE_DISABLE_MOUSE  0x20    /* Disable mouse interface */
  95#define KBD_MODE_KCC            0x40    /* Scan code conversion to PC format */
  96#define KBD_MODE_RFU            0x80
  97
  98/* Output Port Bits */
  99#define KBD_OUT_RESET           0x01    /* 1=normal mode, 0=reset */
 100#define KBD_OUT_A20             0x02    /* x86 only */
 101#define KBD_OUT_OBF             0x10    /* Keyboard output buffer full */
 102#define KBD_OUT_MOUSE_OBF       0x20    /* Mouse output buffer full */
 103
 104/* Mouse Commands */
 105#define AUX_SET_SCALE11         0xE6    /* Set 1:1 scaling */
 106#define AUX_SET_SCALE21         0xE7    /* Set 2:1 scaling */
 107#define AUX_SET_RES             0xE8    /* Set resolution */
 108#define AUX_GET_SCALE           0xE9    /* Get scaling factor */
 109#define AUX_SET_STREAM          0xEA    /* Set stream mode */
 110#define AUX_POLL                0xEB    /* Poll */
 111#define AUX_RESET_WRAP          0xEC    /* Reset wrap mode */
 112#define AUX_SET_WRAP            0xEE    /* Set wrap mode */
 113#define AUX_SET_REMOTE          0xF0    /* Set remote mode */
 114#define AUX_GET_TYPE            0xF2    /* Get type */
 115#define AUX_SET_SAMPLE          0xF3    /* Set sample rate */
 116#define AUX_ENABLE_DEV          0xF4    /* Enable aux device */
 117#define AUX_DISABLE_DEV         0xF5    /* Disable aux device */
 118#define AUX_SET_DEFAULT         0xF6
 119#define AUX_RESET               0xFF    /* Reset aux device */
 120#define AUX_ACK                 0xFA    /* Command byte ACK. */
 121
 122#define MOUSE_STATUS_REMOTE     0x40
 123#define MOUSE_STATUS_ENABLED    0x20
 124#define MOUSE_STATUS_SCALE21    0x10
 125
 126#define KBD_PENDING_KBD         1
 127#define KBD_PENDING_AUX         2
 128
 129typedef struct KBDState {
 130    uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
 131    uint8_t status;
 132    uint8_t mode;
 133    uint8_t outport;
 134    /* Bitmask of devices with data available.  */
 135    uint8_t pending;
 136    void *kbd;
 137    void *mouse;
 138
 139    qemu_irq irq_kbd;
 140    qemu_irq irq_mouse;
 141    qemu_irq *a20_out;
 142    target_phys_addr_t mask;
 143} KBDState;
 144
 145/* update irq and KBD_STAT_[MOUSE_]OBF */
 146/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
 147   incorrect, but it avoids having to simulate exact delays */
 148static void kbd_update_irq(KBDState *s)
 149{
 150    int irq_kbd_level, irq_mouse_level;
 151
 152    irq_kbd_level = 0;
 153    irq_mouse_level = 0;
 154    s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
 155    s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);
 156    if (s->pending) {
 157        s->status |= KBD_STAT_OBF;
 158        s->outport |= KBD_OUT_OBF;
 159        /* kbd data takes priority over aux data.  */
 160        if (s->pending == KBD_PENDING_AUX) {
 161            s->status |= KBD_STAT_MOUSE_OBF;
 162            s->outport |= KBD_OUT_MOUSE_OBF;
 163            if (s->mode & KBD_MODE_MOUSE_INT)
 164                irq_mouse_level = 1;
 165        } else {
 166            if ((s->mode & KBD_MODE_KBD_INT) &&
 167                !(s->mode & KBD_MODE_DISABLE_KBD))
 168                irq_kbd_level = 1;
 169        }
 170    }
 171    qemu_set_irq(s->irq_kbd, irq_kbd_level);
 172    qemu_set_irq(s->irq_mouse, irq_mouse_level);
 173}
 174
 175static void kbd_update_kbd_irq(void *opaque, int level)
 176{
 177    KBDState *s = (KBDState *)opaque;
 178
 179    if (level)
 180        s->pending |= KBD_PENDING_KBD;
 181    else
 182        s->pending &= ~KBD_PENDING_KBD;
 183    kbd_update_irq(s);
 184}
 185
 186static void kbd_update_aux_irq(void *opaque, int level)
 187{
 188    KBDState *s = (KBDState *)opaque;
 189
 190    if (level)
 191        s->pending |= KBD_PENDING_AUX;
 192    else
 193        s->pending &= ~KBD_PENDING_AUX;
 194    kbd_update_irq(s);
 195}
 196
 197static uint32_t kbd_read_status(void *opaque, uint32_t addr)
 198{
 199    KBDState *s = opaque;
 200    int val;
 201    val = s->status;
 202    DPRINTF("kbd: read status=0x%02x\n", val);
 203    return val;
 204}
 205
 206static void kbd_queue(KBDState *s, int b, int aux)
 207{
 208    if (aux)
 209        ps2_queue(s->mouse, b);
 210    else
 211        ps2_queue(s->kbd, b);
 212}
 213
 214static void outport_write(KBDState *s, uint32_t val)
 215{
 216    DPRINTF("kbd: write outport=0x%02x\n", val);
 217    s->outport = val;
 218    if (s->a20_out) {
 219        qemu_set_irq(*s->a20_out, (val >> 1) & 1);
 220    }
 221    if (!(val & 1)) {
 222        qemu_system_reset_request();
 223    }
 224}
 225
 226static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
 227{
 228    KBDState *s = opaque;
 229
 230    DPRINTF("kbd: write cmd=0x%02x\n", val);
 231
 232    /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
 233     * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
 234     * command specify the output port bits to be pulsed.
 235     * 0: Bit should be pulsed. 1: Bit should not be modified.
 236     * The only useful version of this command is pulsing bit 0,
 237     * which does a CPU reset.
 238     */
 239    if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
 240        if(!(val & 1))
 241            val = KBD_CCMD_RESET;
 242        else
 243            val = KBD_CCMD_NO_OP;
 244    }
 245
 246    switch(val) {
 247    case KBD_CCMD_READ_MODE:
 248        kbd_queue(s, s->mode, 0);
 249        break;
 250    case KBD_CCMD_WRITE_MODE:
 251    case KBD_CCMD_WRITE_OBUF:
 252    case KBD_CCMD_WRITE_AUX_OBUF:
 253    case KBD_CCMD_WRITE_MOUSE:
 254    case KBD_CCMD_WRITE_OUTPORT:
 255        s->write_cmd = val;
 256        break;
 257    case KBD_CCMD_MOUSE_DISABLE:
 258        s->mode |= KBD_MODE_DISABLE_MOUSE;
 259        break;
 260    case KBD_CCMD_MOUSE_ENABLE:
 261        s->mode &= ~KBD_MODE_DISABLE_MOUSE;
 262        break;
 263    case KBD_CCMD_TEST_MOUSE:
 264        kbd_queue(s, 0x00, 0);
 265        break;
 266    case KBD_CCMD_SELF_TEST:
 267        s->status |= KBD_STAT_SELFTEST;
 268        kbd_queue(s, 0x55, 0);
 269        break;
 270    case KBD_CCMD_KBD_TEST:
 271        kbd_queue(s, 0x00, 0);
 272        break;
 273    case KBD_CCMD_KBD_DISABLE:
 274        s->mode |= KBD_MODE_DISABLE_KBD;
 275        kbd_update_irq(s);
 276        break;
 277    case KBD_CCMD_KBD_ENABLE:
 278        s->mode &= ~KBD_MODE_DISABLE_KBD;
 279        kbd_update_irq(s);
 280        break;
 281    case KBD_CCMD_READ_INPORT:
 282        kbd_queue(s, 0x00, 0);
 283        break;
 284    case KBD_CCMD_READ_OUTPORT:
 285        kbd_queue(s, s->outport, 0);
 286        break;
 287    case KBD_CCMD_ENABLE_A20:
 288        if (s->a20_out) {
 289            qemu_irq_raise(*s->a20_out);
 290        }
 291        s->outport |= KBD_OUT_A20;
 292        break;
 293    case KBD_CCMD_DISABLE_A20:
 294        if (s->a20_out) {
 295            qemu_irq_lower(*s->a20_out);
 296        }
 297        s->outport &= ~KBD_OUT_A20;
 298        break;
 299    case KBD_CCMD_RESET:
 300        qemu_system_reset_request();
 301        break;
 302    case KBD_CCMD_NO_OP:
 303        /* ignore that */
 304        break;
 305    default:
 306        fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
 307        break;
 308    }
 309}
 310
 311static uint32_t kbd_read_data(void *opaque, uint32_t addr)
 312{
 313    KBDState *s = opaque;
 314    uint32_t val;
 315
 316    if (s->pending == KBD_PENDING_AUX)
 317        val = ps2_read_data(s->mouse);
 318    else
 319        val = ps2_read_data(s->kbd);
 320
 321    DPRINTF("kbd: read data=0x%02x\n", val);
 322    return val;
 323}
 324
 325static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
 326{
 327    KBDState *s = opaque;
 328
 329    DPRINTF("kbd: write data=0x%02x\n", val);
 330
 331    switch(s->write_cmd) {
 332    case 0:
 333        ps2_write_keyboard(s->kbd, val);
 334        break;
 335    case KBD_CCMD_WRITE_MODE:
 336        s->mode = val;
 337        ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
 338        /* ??? */
 339        kbd_update_irq(s);
 340        break;
 341    case KBD_CCMD_WRITE_OBUF:
 342        kbd_queue(s, val, 0);
 343        break;
 344    case KBD_CCMD_WRITE_AUX_OBUF:
 345        kbd_queue(s, val, 1);
 346        break;
 347    case KBD_CCMD_WRITE_OUTPORT:
 348        outport_write(s, val);
 349        break;
 350    case KBD_CCMD_WRITE_MOUSE:
 351        ps2_write_mouse(s->mouse, val);
 352        break;
 353    default:
 354        break;
 355    }
 356    s->write_cmd = 0;
 357}
 358
 359static void kbd_reset(void *opaque)
 360{
 361    KBDState *s = opaque;
 362
 363    s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
 364    s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
 365    s->outport = KBD_OUT_RESET | KBD_OUT_A20;
 366}
 367
 368static const VMStateDescription vmstate_kbd = {
 369    .name = "pckbd",
 370    .version_id = 3,
 371    .minimum_version_id = 3,
 372    .minimum_version_id_old = 3,
 373    .fields      = (VMStateField []) {
 374        VMSTATE_UINT8(write_cmd, KBDState),
 375        VMSTATE_UINT8(status, KBDState),
 376        VMSTATE_UINT8(mode, KBDState),
 377        VMSTATE_UINT8(pending, KBDState),
 378        VMSTATE_END_OF_LIST()
 379    }
 380};
 381
 382/* Memory mapped interface */
 383static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
 384{
 385    KBDState *s = opaque;
 386
 387    if (addr & s->mask)
 388        return kbd_read_status(s, 0) & 0xff;
 389    else
 390        return kbd_read_data(s, 0) & 0xff;
 391}
 392
 393static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
 394{
 395    KBDState *s = opaque;
 396
 397    if (addr & s->mask)
 398        kbd_write_command(s, 0, value & 0xff);
 399    else
 400        kbd_write_data(s, 0, value & 0xff);
 401}
 402
 403static CPUReadMemoryFunc * const kbd_mm_read[] = {
 404    &kbd_mm_readb,
 405    &kbd_mm_readb,
 406    &kbd_mm_readb,
 407};
 408
 409static CPUWriteMemoryFunc * const kbd_mm_write[] = {
 410    &kbd_mm_writeb,
 411    &kbd_mm_writeb,
 412    &kbd_mm_writeb,
 413};
 414
 415void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 416                   target_phys_addr_t base, ram_addr_t size,
 417                   target_phys_addr_t mask)
 418{
 419    KBDState *s = qemu_mallocz(sizeof(KBDState));
 420    int s_io_memory;
 421
 422    s->irq_kbd = kbd_irq;
 423    s->irq_mouse = mouse_irq;
 424    s->mask = mask;
 425
 426    vmstate_register(NULL, 0, &vmstate_kbd, s);
 427    s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s,
 428                                         DEVICE_NATIVE_ENDIAN);
 429    cpu_register_physical_memory(base, size, s_io_memory);
 430
 431    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
 432    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 433    qemu_register_reset(kbd_reset, s);
 434}
 435
 436typedef struct ISAKBDState {
 437    ISADevice dev;
 438    KBDState  kbd;
 439} ISAKBDState;
 440
 441void i8042_isa_mouse_fake_event(void *opaque)
 442{
 443    ISADevice *dev = opaque;
 444    KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
 445
 446    ps2_mouse_fake_event(s->mouse);
 447}
 448
 449void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out)
 450{
 451    KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
 452
 453    s->a20_out = a20_out;
 454}
 455
 456static const VMStateDescription vmstate_kbd_isa = {
 457    .name = "pckbd",
 458    .version_id = 3,
 459    .minimum_version_id = 3,
 460    .minimum_version_id_old = 3,
 461    .fields      = (VMStateField []) {
 462        VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
 463        VMSTATE_END_OF_LIST()
 464    }
 465};
 466
 467static int i8042_initfn(ISADevice *dev)
 468{
 469    KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
 470
 471    isa_init_irq(dev, &s->irq_kbd, 1);
 472    isa_init_irq(dev, &s->irq_mouse, 12);
 473
 474    register_ioport_read(0x60, 1, 1, kbd_read_data, s);
 475    register_ioport_write(0x60, 1, 1, kbd_write_data, s);
 476    isa_init_ioport(dev, 0x60);
 477    register_ioport_read(0x64, 1, 1, kbd_read_status, s);
 478    register_ioport_write(0x64, 1, 1, kbd_write_command, s);
 479    isa_init_ioport(dev, 0x64);
 480
 481    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
 482    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 483    qemu_register_reset(kbd_reset, s);
 484    return 0;
 485}
 486
 487static ISADeviceInfo i8042_info = {
 488    .qdev.name     = "i8042",
 489    .qdev.size     = sizeof(ISAKBDState),
 490    .qdev.vmsd     = &vmstate_kbd_isa,
 491    .qdev.no_user  = 1,
 492    .init          = i8042_initfn,
 493};
 494
 495static void i8042_register(void)
 496{
 497    isa_qdev_register(&i8042_info);
 498}
 499device_init(i8042_register)
 500