LXR qemu/hw/soc

   1/*
   2 * On-chip DMA controller framework.
   3 *
   4 * Copyright (C) 2008 Nokia Corporation
   5 * Written by Andrzej Zaborowski <andrew@openedhand.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 or
  10 * (at your option) version 3 of the License.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License along
  18 * with this program; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20
  21struct soc_dma_s;
  22struct soc_dma_ch_s;
  23typedef void (*soc_dma_io_t)(void *opaque, uint8_t *buf, int len);
  24typedef void (*soc_dma_transfer_t)(struct soc_dma_ch_s *ch);
  25
  26enum soc_dma_port_type {
  27    soc_dma_port_mem,
  28    soc_dma_port_fifo,
  29    soc_dma_port_other,
  30};
  31
  32enum soc_dma_access_type {
  33    soc_dma_access_const,
  34    soc_dma_access_linear,
  35    soc_dma_access_other,
  36};
  37
  38struct soc_dma_ch_s {
  39    /* Private */
  40    struct soc_dma_s *dma;
  41    int num;
  42    QEMUTimer *timer;
  43
  44    /* Set by soc_dma.c */
  45    int enable;
  46    int update;
  47
  48    /* This should be set by dma->setup_fn().  */
  49    int bytes;
  50    /* Initialised by the DMA module, call soc_dma_ch_update after writing.  */
  51    enum soc_dma_access_type type[2];
  52    target_phys_addr_t vaddr[2];        /* Updated by .transfer_fn().  */
  53    /* Private */
  54    void *paddr[2];
  55    soc_dma_io_t io_fn[2];
  56    void *io_opaque[2];
  57
  58    int running;
  59    soc_dma_transfer_t transfer_fn;
  60
  61    /* Set and used by the DMA module.  */
  62    void *opaque;
  63};
  64
  65struct soc_dma_s {
  66    /* Following fields are set by the SoC DMA module and can be used
  67     * by anybody.  */
  68    uint64_t drqbmp;    /* Is zeroed by soc_dma_reset() */
  69    qemu_irq *drq;
  70    void *opaque;
  71    int64_t freq;
  72    soc_dma_transfer_t transfer_fn;
  73    soc_dma_transfer_t setup_fn;
  74    /* Set by soc_dma_init() for use by the DMA module.  */
  75    struct soc_dma_ch_s *ch;
  76};
  77
  78/* Call to activate or stop a DMA channel.  */
  79void soc_dma_set_request(struct soc_dma_ch_s *ch, int level);
  80/* Call after every write to one of the following fields and before
  81 * calling soc_dma_set_request(ch, 1):
  82 *   ch->type[0...1],
  83 *   ch->vaddr[0...1],
  84 *   ch->paddr[0...1],
  85 * or after a soc_dma_port_add_fifo() or soc_dma_port_add_mem().  */
  86void soc_dma_ch_update(struct soc_dma_ch_s *ch);
  87
  88/* The SoC should call this when the DMA module is being reset.  */
  89void soc_dma_reset(struct soc_dma_s *s);
  90struct soc_dma_s *soc_dma_init(int n);
  91
  92void soc_dma_port_add_fifo(struct soc_dma_s *dma, target_phys_addr_t virt_base,
  93                soc_dma_io_t fn, void *opaque, int out);
  94void soc_dma_port_add_mem(struct soc_dma_s *dma, uint8_t *phys_base,
  95                target_phys_addr_t virt_base, size_t size);
  96
  97static inline void soc_dma_port_add_fifo_in(struct soc_dma_s *dma,
  98                target_phys_addr_t virt_base, soc_dma_io_t fn, void *opaque)
  99{
 100    return soc_dma_port_add_fifo(dma, virt_base, fn, opaque, 0);
 101}
 102
 103static inline void soc_dma_port_add_fifo_out(struct soc_dma_s *dma,
 104                target_phys_addr_t virt_base, soc_dma_io_t fn, void *opaque)
 105{
 106    return soc_dma_port_add_fifo(dma, virt_base, fn, opaque, 1);
 107}
 108
 109static inline void soc_dma_port_add_mem_ram(struct soc_dma_s *dma,
 110                ram_addr_t offset, target_phys_addr_t virt_base, size_t size)
 111{
 112    return soc_dma_port_add_mem(dma, qemu_get_ram_ptr(offset), virt_base, size);
 113}
 114