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19#include "config.h"
20#include "dyngen-exec.h"
21
22
23#ifdef TARGET_X86_64
24#define TARGET_LONG_BITS 64
25#else
26#define TARGET_LONG_BITS 32
27#endif
28
29#include "cpu-defs.h"
30
31register struct CPUX86State *env asm(AREG0);
32
33#include "qemu-common.h"
34#include "qemu-log.h"
35
36#undef EAX
37#define EAX (env->regs[R_EAX])
38#undef ECX
39#define ECX (env->regs[R_ECX])
40#undef EDX
41#define EDX (env->regs[R_EDX])
42#undef EBX
43#define EBX (env->regs[R_EBX])
44#undef ESP
45#define ESP (env->regs[R_ESP])
46#undef EBP
47#define EBP (env->regs[R_EBP])
48#undef ESI
49#define ESI (env->regs[R_ESI])
50#undef EDI
51#define EDI (env->regs[R_EDI])
52#undef EIP
53#define EIP (env->eip)
54#define DF (env->df)
55
56#define CC_SRC (env->cc_src)
57#define CC_DST (env->cc_dst)
58#define CC_OP (env->cc_op)
59
60
61#define FT0 (env->ft0)
62#define ST0 (env->fpregs[env->fpstt].d)
63#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
64#define ST1 ST(1)
65
66#include "cpu.h"
67#include "exec-all.h"
68
69
70void do_interrupt(int intno, int is_int, int error_code,
71 target_ulong next_eip, int is_hw);
72void do_interrupt_user(int intno, int is_int, int error_code,
73 target_ulong next_eip);
74void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
75void QEMU_NORETURN raise_exception(int exception_index);
76void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
77void do_smm_enter(void);
78
79
80static inline target_long lshift(target_long x, int n)
81{
82 if (n >= 0)
83 return x << n;
84 else
85 return x >> (-n);
86}
87
88#include "helper.h"
89
90static inline void svm_check_intercept(uint32_t type)
91{
92 helper_svm_check_intercept_param(type, 0);
93}
94
95#if !defined(CONFIG_USER_ONLY)
96
97#include "softmmu_exec.h"
98
99#endif
100
101#ifdef USE_X86LDOUBLE
102
103#define floatx_to_int32 floatx80_to_int32
104#define floatx_to_int64 floatx80_to_int64
105#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
106#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
107#define int32_to_floatx int32_to_floatx80
108#define int64_to_floatx int64_to_floatx80
109#define float32_to_floatx float32_to_floatx80
110#define float64_to_floatx float64_to_floatx80
111#define floatx_to_float32 floatx80_to_float32
112#define floatx_to_float64 floatx80_to_float64
113#define floatx_abs floatx80_abs
114#define floatx_chs floatx80_chs
115#define floatx_round_to_int floatx80_round_to_int
116#define floatx_compare floatx80_compare
117#define floatx_compare_quiet floatx80_compare_quiet
118#else
119#define floatx_to_int32 float64_to_int32
120#define floatx_to_int64 float64_to_int64
121#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
122#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
123#define int32_to_floatx int32_to_float64
124#define int64_to_floatx int64_to_float64
125#define float32_to_floatx float32_to_float64
126#define float64_to_floatx(x, e) (x)
127#define floatx_to_float32 float64_to_float32
128#define floatx_to_float64(x, e) (x)
129#define floatx_abs float64_abs
130#define floatx_chs float64_chs
131#define floatx_round_to_int float64_round_to_int
132#define floatx_compare float64_compare
133#define floatx_compare_quiet float64_compare_quiet
134#endif
135
136#define RC_MASK 0xc00
137#define RC_NEAR 0x000
138#define RC_DOWN 0x400
139#define RC_UP 0x800
140#define RC_CHOP 0xc00
141
142#define MAXTAN 9223372036854775808.0
143
144#ifdef USE_X86LDOUBLE
145
146
147typedef union {
148 long double d;
149 struct {
150 unsigned long long lower;
151 unsigned short upper;
152 } l;
153} CPU86_LDoubleU;
154
155
156#define MAXEXPD 0x7fff
157#define EXPBIAS 16383
158#define EXPD(fp) (fp.l.upper & 0x7fff)
159#define SIGND(fp) ((fp.l.upper) & 0x8000)
160#define MANTD(fp) (fp.l.lower)
161#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
162
163#else
164
165
166typedef union {
167 double d;
168#if !defined(HOST_WORDS_BIGENDIAN) && !defined(__arm__)
169 struct {
170 uint32_t lower;
171 int32_t upper;
172 } l;
173#else
174 struct {
175 int32_t upper;
176 uint32_t lower;
177 } l;
178#endif
179#ifndef __arm__
180 int64_t ll;
181#endif
182} CPU86_LDoubleU;
183
184
185#define MAXEXPD 0x7ff
186#define EXPBIAS 1023
187#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
188#define SIGND(fp) ((fp.l.upper) & 0x80000000)
189#ifdef __arm__
190#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
191#else
192#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
193#endif
194#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
195#endif
196
197static inline void fpush(void)
198{
199 env->fpstt = (env->fpstt - 1) & 7;
200 env->fptags[env->fpstt] = 0;
201}
202
203static inline void fpop(void)
204{
205 env->fptags[env->fpstt] = 1;
206 env->fpstt = (env->fpstt + 1) & 7;
207}
208
209#ifndef USE_X86LDOUBLE
210static inline CPU86_LDouble helper_fldt(target_ulong ptr)
211{
212 CPU86_LDoubleU temp;
213 int upper, e;
214 uint64_t ll;
215
216
217 upper = lduw(ptr + 8);
218
219 e = (upper & 0x7fff) - 16383 + EXPBIAS;
220 e |= (upper >> 4) & 0x800;
221 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
222#ifdef __arm__
223 temp.l.upper = (e << 20) | (ll >> 32);
224 temp.l.lower = ll;
225#else
226 temp.ll = ll | ((uint64_t)e << 52);
227#endif
228 return temp.d;
229}
230
231static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
232{
233 CPU86_LDoubleU temp;
234 int e;
235
236 temp.d = f;
237
238 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
239
240 e = EXPD(temp) - EXPBIAS + 16383;
241 e |= SIGND(temp) >> 16;
242 stw(ptr + 8, e);
243}
244#else
245
246
247
248static inline CPU86_LDouble helper_fldt(target_ulong ptr)
249{
250 CPU86_LDoubleU temp;
251
252 temp.l.lower = ldq(ptr);
253 temp.l.upper = lduw(ptr + 8);
254 return temp.d;
255}
256
257static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
258{
259 CPU86_LDoubleU temp;
260
261 temp.d = f;
262 stq(ptr, temp.l.lower);
263 stw(ptr + 8, temp.l.upper);
264}
265
266#endif
267
268#define FPUS_IE (1 << 0)
269#define FPUS_DE (1 << 1)
270#define FPUS_ZE (1 << 2)
271#define FPUS_OE (1 << 3)
272#define FPUS_UE (1 << 4)
273#define FPUS_PE (1 << 5)
274#define FPUS_SF (1 << 6)
275#define FPUS_SE (1 << 7)
276#define FPUS_B (1 << 15)
277
278#define FPUC_EM 0x3f
279
280static inline uint32_t compute_eflags(void)
281{
282 return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
283}
284
285
286static inline void load_eflags(int eflags, int update_mask)
287{
288 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
289 DF = 1 - (2 * ((eflags >> 10) & 1));
290 env->eflags = (env->eflags & ~update_mask) |
291 (eflags & update_mask) | 0x2;
292}
293
294static inline int cpu_has_work(CPUState *env)
295{
296 int work;
297
298 work = (env->interrupt_request & CPU_INTERRUPT_HARD) &&
299 (env->eflags & IF_MASK);
300 work |= env->interrupt_request & CPU_INTERRUPT_NMI;
301 work |= env->interrupt_request & CPU_INTERRUPT_INIT;
302 work |= env->interrupt_request & CPU_INTERRUPT_SIPI;
303
304 return work;
305}
306
307static inline int cpu_halted(CPUState *env) {
308
309 if (!env->halted)
310 return 0;
311
312 if (cpu_has_work(env)) {
313 env->halted = 0;
314 return 0;
315 }
316 return EXCP_HALTED;
317}
318
319
320
321static inline void cpu_load_efer(CPUState *env, uint64_t val)
322{
323 env->efer = val;
324 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
325 if (env->efer & MSR_EFER_LMA)
326 env->hflags |= HF_LMA_MASK;
327 if (env->efer & MSR_EFER_SVME)
328 env->hflags |= HF_SVME_MASK;
329}
330
331static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
332{
333 env->eip = tb->pc - tb->cs_base;
334}
335
336