LXR qemu/hw/isa.h

   1#ifndef HW_ISA_H
   2#define HW_ISA_H
   3
   4/* ISA bus */
   5
   6#include "ioport.h"
   7#include "qdev.h"
   8
   9typedef struct ISABus ISABus;
  10typedef struct ISADevice ISADevice;
  11typedef struct ISADeviceInfo ISADeviceInfo;
  12
  13struct ISADevice {
  14    DeviceState qdev;
  15    uint32_t isairq[2];
  16    int nirqs;
  17    uint16_t ioports[32];
  18    int nioports;
  19};
  20
  21typedef int (*isa_qdev_initfn)(ISADevice *dev);
  22struct ISADeviceInfo {
  23    DeviceInfo qdev;
  24    isa_qdev_initfn init;
  25};
  26
  27ISABus *isa_bus_new(DeviceState *dev);
  28void isa_bus_irqs(qemu_irq *irqs);
  29qemu_irq isa_get_irq(int isairq);
  30void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
  31void isa_init_ioport(ISADevice *dev, uint16_t ioport);
  32void isa_init_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
  33void isa_qdev_register(ISADeviceInfo *info);
  34ISADevice *isa_create(const char *name);
  35ISADevice *isa_try_create(const char *name);
  36ISADevice *isa_create_simple(const char *name);
  37
  38extern target_phys_addr_t isa_mem_base;
  39
  40void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
  41
  42/* dma.c */
  43int DMA_get_channel_mode (int nchan);
  44int DMA_read_memory (int nchan, void *buf, int pos, int size);
  45int DMA_write_memory (int nchan, void *buf, int pos, int size);
  46void DMA_hold_DREQ (int nchan);
  47void DMA_release_DREQ (int nchan);
  48void DMA_schedule(int nchan);
  49void DMA_init(int high_page_enable, qemu_irq *cpu_request_exit);
  50void DMA_register_channel (int nchan,
  51                           DMA_transfer_handler transfer_handler,
  52                           void *opaque);
  53#endif
  54