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25#ifndef _GRLIB_H_
26#define _GRLIB_H_
27
28#include "qdev.h"
29#include "sysbus.h"
30
31
32
33
34
35
36
37typedef void (*set_pil_in_fn) (void *opaque, uint32_t pil_in);
38
39void grlib_irqmp_set_irq(void *opaque, int irq, int level);
40
41void grlib_irqmp_ack(DeviceState *dev, int intno);
42
43static inline
44DeviceState *grlib_irqmp_create(target_phys_addr_t base,
45 CPUState *env,
46 qemu_irq **cpu_irqs,
47 uint32_t nr_irqs,
48 set_pil_in_fn set_pil_in)
49{
50 DeviceState *dev;
51
52 assert(cpu_irqs != NULL);
53
54 dev = qdev_create(NULL, "grlib,irqmp");
55 qdev_prop_set_ptr(dev, "set_pil_in", set_pil_in);
56 qdev_prop_set_ptr(dev, "set_pil_in_opaque", env);
57
58 if (qdev_init(dev)) {
59 return NULL;
60 }
61
62 env->irq_manager = dev;
63
64 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
65
66 *cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq,
67 dev,
68 nr_irqs);
69
70 return dev;
71}
72
73
74
75static inline
76DeviceState *grlib_gptimer_create(target_phys_addr_t base,
77 uint32_t nr_timers,
78 uint32_t freq,
79 qemu_irq *cpu_irqs,
80 int base_irq)
81{
82 DeviceState *dev;
83 int i;
84
85 dev = qdev_create(NULL, "grlib,gptimer");
86 qdev_prop_set_uint32(dev, "nr-timers", nr_timers);
87 qdev_prop_set_uint32(dev, "frequency", freq);
88 qdev_prop_set_uint32(dev, "irq-line", base_irq);
89
90 if (qdev_init(dev)) {
91 return NULL;
92 }
93
94 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
95
96 for (i = 0; i < nr_timers; i++) {
97 sysbus_connect_irq(sysbus_from_qdev(dev), i, cpu_irqs[base_irq + i]);
98 }
99
100 return dev;
101}
102
103
104
105static inline
106DeviceState *grlib_apbuart_create(target_phys_addr_t base,
107 CharDriverState *serial,
108 qemu_irq irq)
109{
110 DeviceState *dev;
111
112 dev = qdev_create(NULL, "grlib,apbuart");
113 qdev_prop_set_chr(dev, "chrdev", serial);
114
115 if (qdev_init(dev)) {
116 return NULL;
117 }
118
119 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
120
121 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
122
123 return dev;
124}
125
126#endif
127