qemu/hw/pl110.c
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   1/*
   2 * Arm PrimeCell PL110 Color LCD Controller
   3 *
   4 * Copyright (c) 2005-2009 CodeSourcery.
   5 * Written by Paul Brook
   6 *
   7 * This code is licensed under the GNU LGPL
   8 */
   9
  10#include "sysbus.h"
  11#include "console.h"
  12#include "framebuffer.h"
  13
  14#define PL110_CR_EN   0x001
  15#define PL110_CR_BGR  0x100
  16#define PL110_CR_BEBO 0x200
  17#define PL110_CR_BEPO 0x400
  18#define PL110_CR_PWR  0x800
  19
  20enum pl110_bppmode
  21{
  22    BPP_1,
  23    BPP_2,
  24    BPP_4,
  25    BPP_8,
  26    BPP_16,
  27    BPP_32,
  28    BPP_16_565, /* PL111 only */
  29    BPP_12      /* PL111 only */
  30};
  31
  32
  33/* The Versatile/PB uses a slightly modified PL110 controller.  */
  34enum pl110_version
  35{
  36    PL110,
  37    PL110_VERSATILE,
  38    PL111
  39};
  40
  41typedef struct {
  42    SysBusDevice busdev;
  43    DisplayState *ds;
  44
  45    int version;
  46    uint32_t timing[4];
  47    uint32_t cr;
  48    uint32_t upbase;
  49    uint32_t lpbase;
  50    uint32_t int_status;
  51    uint32_t int_mask;
  52    int cols;
  53    int rows;
  54    enum pl110_bppmode bpp;
  55    int invalidate;
  56    uint32_t mux_ctrl;
  57    uint32_t pallette[256];
  58    uint32_t raw_pallette[128];
  59    qemu_irq irq;
  60} pl110_state;
  61
  62static const VMStateDescription vmstate_pl110 = {
  63    .name = "pl110",
  64    .version_id = 2,
  65    .minimum_version_id = 1,
  66    .fields = (VMStateField[]) {
  67        VMSTATE_INT32(version, pl110_state),
  68        VMSTATE_UINT32_ARRAY(timing, pl110_state, 4),
  69        VMSTATE_UINT32(cr, pl110_state),
  70        VMSTATE_UINT32(upbase, pl110_state),
  71        VMSTATE_UINT32(lpbase, pl110_state),
  72        VMSTATE_UINT32(int_status, pl110_state),
  73        VMSTATE_UINT32(int_mask, pl110_state),
  74        VMSTATE_INT32(cols, pl110_state),
  75        VMSTATE_INT32(rows, pl110_state),
  76        VMSTATE_UINT32(bpp, pl110_state),
  77        VMSTATE_INT32(invalidate, pl110_state),
  78        VMSTATE_UINT32_ARRAY(pallette, pl110_state, 256),
  79        VMSTATE_UINT32_ARRAY(raw_pallette, pl110_state, 128),
  80        VMSTATE_UINT32_V(mux_ctrl, pl110_state, 2),
  81        VMSTATE_END_OF_LIST()
  82    }
  83};
  84
  85static const unsigned char pl110_id[] =
  86{ 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  87
  88/* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
  89   has a different ID.  However Linux only looks for the normal ID.  */
  90#if 0
  91static const unsigned char pl110_versatile_id[] =
  92{ 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  93#else
  94#define pl110_versatile_id pl110_id
  95#endif
  96
  97static const unsigned char pl111_id[] = {
  98    0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
  99};
 100
 101/* Indexed by pl110_version */
 102static const unsigned char *idregs[] = {
 103    pl110_id,
 104    pl110_versatile_id,
 105    pl111_id
 106};
 107
 108#include "pixel_ops.h"
 109
 110#define BITS 8
 111#include "pl110_template.h"
 112#define BITS 15
 113#include "pl110_template.h"
 114#define BITS 16
 115#include "pl110_template.h"
 116#define BITS 24
 117#include "pl110_template.h"
 118#define BITS 32
 119#include "pl110_template.h"
 120
 121static int pl110_enabled(pl110_state *s)
 122{
 123  return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
 124}
 125
 126static void pl110_update_display(void *opaque)
 127{
 128    pl110_state *s = (pl110_state *)opaque;
 129    drawfn* fntable;
 130    drawfn fn;
 131    int dest_width;
 132    int src_width;
 133    int bpp_offset;
 134    int first;
 135    int last;
 136
 137    if (!pl110_enabled(s))
 138        return;
 139
 140    switch (ds_get_bits_per_pixel(s->ds)) {
 141    case 0:
 142        return;
 143    case 8:
 144        fntable = pl110_draw_fn_8;
 145        dest_width = 1;
 146        break;
 147    case 15:
 148        fntable = pl110_draw_fn_15;
 149        dest_width = 2;
 150        break;
 151    case 16:
 152        fntable = pl110_draw_fn_16;
 153        dest_width = 2;
 154        break;
 155    case 24:
 156        fntable = pl110_draw_fn_24;
 157        dest_width = 3;
 158        break;
 159    case 32:
 160        fntable = pl110_draw_fn_32;
 161        dest_width = 4;
 162        break;
 163    default:
 164        fprintf(stderr, "pl110: Bad color depth\n");
 165        exit(1);
 166    }
 167    if (s->cr & PL110_CR_BGR)
 168        bpp_offset = 0;
 169    else
 170        bpp_offset = 24;
 171
 172    if ((s->version != PL111) && (s->bpp == BPP_16)) {
 173        /* The PL110's native 16 bit mode is 5551; however
 174         * most boards with a PL110 implement an external
 175         * mux which allows bits to be reshuffled to give
 176         * 565 format. The mux is typically controlled by
 177         * an external system register.
 178         * This is controlled by a GPIO input pin
 179         * so boards can wire it up to their register.
 180         *
 181         * The PL111 straightforwardly implements both
 182         * 5551 and 565 under control of the bpp field
 183         * in the LCDControl register.
 184         */
 185        switch (s->mux_ctrl) {
 186        case 3: /* 565 BGR */
 187            bpp_offset = (BPP_16_565 - BPP_16);
 188            break;
 189        case 1: /* 5551 */
 190            break;
 191        case 0: /* 888; also if we have loaded vmstate from an old version */
 192        case 2: /* 565 RGB */
 193        default:
 194            /* treat as 565 but honour BGR bit */
 195            bpp_offset += (BPP_16_565 - BPP_16);
 196            break;
 197        }
 198    }
 199
 200    if (s->cr & PL110_CR_BEBO)
 201        fn = fntable[s->bpp + 8 + bpp_offset];
 202    else if (s->cr & PL110_CR_BEPO)
 203        fn = fntable[s->bpp + 16 + bpp_offset];
 204    else
 205        fn = fntable[s->bpp + bpp_offset];
 206
 207    src_width = s->cols;
 208    switch (s->bpp) {
 209    case BPP_1:
 210        src_width >>= 3;
 211        break;
 212    case BPP_2:
 213        src_width >>= 2;
 214        break;
 215    case BPP_4:
 216        src_width >>= 1;
 217        break;
 218    case BPP_8:
 219        break;
 220    case BPP_16:
 221    case BPP_16_565:
 222    case BPP_12:
 223        src_width <<= 1;
 224        break;
 225    case BPP_32:
 226        src_width <<= 2;
 227        break;
 228    }
 229    dest_width *= s->cols;
 230    first = 0;
 231    framebuffer_update_display(s->ds,
 232                               s->upbase, s->cols, s->rows,
 233                               src_width, dest_width, 0,
 234                               s->invalidate,
 235                               fn, s->pallette,
 236                               &first, &last);
 237    if (first >= 0) {
 238        dpy_update(s->ds, 0, first, s->cols, last - first + 1);
 239    }
 240    s->invalidate = 0;
 241}
 242
 243static void pl110_invalidate_display(void * opaque)
 244{
 245    pl110_state *s = (pl110_state *)opaque;
 246    s->invalidate = 1;
 247    if (pl110_enabled(s)) {
 248        qemu_console_resize(s->ds, s->cols, s->rows);
 249    }
 250}
 251
 252static void pl110_update_pallette(pl110_state *s, int n)
 253{
 254    int i;
 255    uint32_t raw;
 256    unsigned int r, g, b;
 257
 258    raw = s->raw_pallette[n];
 259    n <<= 1;
 260    for (i = 0; i < 2; i++) {
 261        r = (raw & 0x1f) << 3;
 262        raw >>= 5;
 263        g = (raw & 0x1f) << 3;
 264        raw >>= 5;
 265        b = (raw & 0x1f) << 3;
 266        /* The I bit is ignored.  */
 267        raw >>= 6;
 268        switch (ds_get_bits_per_pixel(s->ds)) {
 269        case 8:
 270            s->pallette[n] = rgb_to_pixel8(r, g, b);
 271            break;
 272        case 15:
 273            s->pallette[n] = rgb_to_pixel15(r, g, b);
 274            break;
 275        case 16:
 276            s->pallette[n] = rgb_to_pixel16(r, g, b);
 277            break;
 278        case 24:
 279        case 32:
 280            s->pallette[n] = rgb_to_pixel32(r, g, b);
 281            break;
 282        }
 283        n++;
 284    }
 285}
 286
 287static void pl110_resize(pl110_state *s, int width, int height)
 288{
 289    if (width != s->cols || height != s->rows) {
 290        if (pl110_enabled(s)) {
 291            qemu_console_resize(s->ds, width, height);
 292        }
 293    }
 294    s->cols = width;
 295    s->rows = height;
 296}
 297
 298/* Update interrupts.  */
 299static void pl110_update(pl110_state *s)
 300{
 301  /* TODO: Implement interrupts.  */
 302}
 303
 304static uint32_t pl110_read(void *opaque, target_phys_addr_t offset)
 305{
 306    pl110_state *s = (pl110_state *)opaque;
 307
 308    if (offset >= 0xfe0 && offset < 0x1000) {
 309        return idregs[s->version][(offset - 0xfe0) >> 2];
 310    }
 311    if (offset >= 0x200 && offset < 0x400) {
 312        return s->raw_pallette[(offset - 0x200) >> 2];
 313    }
 314    switch (offset >> 2) {
 315    case 0: /* LCDTiming0 */
 316        return s->timing[0];
 317    case 1: /* LCDTiming1 */
 318        return s->timing[1];
 319    case 2: /* LCDTiming2 */
 320        return s->timing[2];
 321    case 3: /* LCDTiming3 */
 322        return s->timing[3];
 323    case 4: /* LCDUPBASE */
 324        return s->upbase;
 325    case 5: /* LCDLPBASE */
 326        return s->lpbase;
 327    case 6: /* LCDIMSC */
 328        if (s->version != PL110) {
 329            return s->cr;
 330        }
 331        return s->int_mask;
 332    case 7: /* LCDControl */
 333        if (s->version != PL110) {
 334            return s->int_mask;
 335        }
 336        return s->cr;
 337    case 8: /* LCDRIS */
 338        return s->int_status;
 339    case 9: /* LCDMIS */
 340        return s->int_status & s->int_mask;
 341    case 11: /* LCDUPCURR */
 342        /* TODO: Implement vertical refresh.  */
 343        return s->upbase;
 344    case 12: /* LCDLPCURR */
 345        return s->lpbase;
 346    default:
 347        hw_error("pl110_read: Bad offset %x\n", (int)offset);
 348        return 0;
 349    }
 350}
 351
 352static void pl110_write(void *opaque, target_phys_addr_t offset,
 353                        uint32_t val)
 354{
 355    pl110_state *s = (pl110_state *)opaque;
 356    int n;
 357
 358    /* For simplicity invalidate the display whenever a control register
 359       is writen to.  */
 360    s->invalidate = 1;
 361    if (offset >= 0x200 && offset < 0x400) {
 362        /* Pallette.  */
 363        n = (offset - 0x200) >> 2;
 364        s->raw_pallette[(offset - 0x200) >> 2] = val;
 365        pl110_update_pallette(s, n);
 366        return;
 367    }
 368    switch (offset >> 2) {
 369    case 0: /* LCDTiming0 */
 370        s->timing[0] = val;
 371        n = ((val & 0xfc) + 4) * 4;
 372        pl110_resize(s, n, s->rows);
 373        break;
 374    case 1: /* LCDTiming1 */
 375        s->timing[1] = val;
 376        n = (val & 0x3ff) + 1;
 377        pl110_resize(s, s->cols, n);
 378        break;
 379    case 2: /* LCDTiming2 */
 380        s->timing[2] = val;
 381        break;
 382    case 3: /* LCDTiming3 */
 383        s->timing[3] = val;
 384        break;
 385    case 4: /* LCDUPBASE */
 386        s->upbase = val;
 387        break;
 388    case 5: /* LCDLPBASE */
 389        s->lpbase = val;
 390        break;
 391    case 6: /* LCDIMSC */
 392        if (s->version != PL110) {
 393            goto control;
 394        }
 395    imsc:
 396        s->int_mask = val;
 397        pl110_update(s);
 398        break;
 399    case 7: /* LCDControl */
 400        if (s->version != PL110) {
 401            goto imsc;
 402        }
 403    control:
 404        s->cr = val;
 405        s->bpp = (val >> 1) & 7;
 406        if (pl110_enabled(s)) {
 407            qemu_console_resize(s->ds, s->cols, s->rows);
 408        }
 409        break;
 410    case 10: /* LCDICR */
 411        s->int_status &= ~val;
 412        pl110_update(s);
 413        break;
 414    default:
 415        hw_error("pl110_write: Bad offset %x\n", (int)offset);
 416    }
 417}
 418
 419static CPUReadMemoryFunc * const pl110_readfn[] = {
 420   pl110_read,
 421   pl110_read,
 422   pl110_read
 423};
 424
 425static CPUWriteMemoryFunc * const pl110_writefn[] = {
 426   pl110_write,
 427   pl110_write,
 428   pl110_write
 429};
 430
 431static void pl110_mux_ctrl_set(void *opaque, int line, int level)
 432{
 433    pl110_state *s = (pl110_state *)opaque;
 434    s->mux_ctrl = level;
 435}
 436
 437static int pl110_init(SysBusDevice *dev)
 438{
 439    pl110_state *s = FROM_SYSBUS(pl110_state, dev);
 440    int iomemtype;
 441
 442    iomemtype = cpu_register_io_memory(pl110_readfn,
 443                                       pl110_writefn, s,
 444                                       DEVICE_NATIVE_ENDIAN);
 445    sysbus_init_mmio(dev, 0x1000, iomemtype);
 446    sysbus_init_irq(dev, &s->irq);
 447    qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
 448    s->ds = graphic_console_init(pl110_update_display,
 449                                 pl110_invalidate_display,
 450                                 NULL, NULL, s);
 451    return 0;
 452}
 453
 454static int pl110_versatile_init(SysBusDevice *dev)
 455{
 456    pl110_state *s = FROM_SYSBUS(pl110_state, dev);
 457    s->version = PL110_VERSATILE;
 458    return pl110_init(dev);
 459}
 460
 461static int pl111_init(SysBusDevice *dev)
 462{
 463    pl110_state *s = FROM_SYSBUS(pl110_state, dev);
 464    s->version = PL111;
 465    return pl110_init(dev);
 466}
 467
 468static SysBusDeviceInfo pl110_info = {
 469    .init = pl110_init,
 470    .qdev.name = "pl110",
 471    .qdev.size = sizeof(pl110_state),
 472    .qdev.vmsd = &vmstate_pl110,
 473    .qdev.no_user = 1,
 474};
 475
 476static SysBusDeviceInfo pl110_versatile_info = {
 477    .init = pl110_versatile_init,
 478    .qdev.name = "pl110_versatile",
 479    .qdev.size = sizeof(pl110_state),
 480    .qdev.vmsd = &vmstate_pl110,
 481    .qdev.no_user = 1,
 482};
 483
 484static SysBusDeviceInfo pl111_info = {
 485    .init = pl111_init,
 486    .qdev.name = "pl111",
 487    .qdev.size = sizeof(pl110_state),
 488    .qdev.vmsd = &vmstate_pl110,
 489    .qdev.no_user = 1,
 490};
 491
 492static void pl110_register_devices(void)
 493{
 494    sysbus_register_withprop(&pl110_info);
 495    sysbus_register_withprop(&pl110_versatile_info);
 496    sysbus_register_withprop(&pl111_info);
 497}
 498
 499device_init(pl110_register_devices)
 500