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25#include "sysbus.h"
26#include "hw.h"
27#include "pc.h"
28#include "net.h"
29#include "flash.h"
30#include "sysemu.h"
31#include "devices.h"
32#include "boards.h"
33#include "device_tree.h"
34#include "loader.h"
35#include "elf.h"
36#include "qemu-log.h"
37#include "exec-memory.h"
38
39#include "ppc.h"
40#include "ppc4xx.h"
41#include "ppc440.h"
42#include "ppc405.h"
43
44#include "blockdev.h"
45#include "xilinx.h"
46
47#define EPAPR_MAGIC (0x45504150)
48#define FLASH_SIZE (16 * 1024 * 1024)
49
50static struct boot_info
51{
52 uint32_t bootstrap_pc;
53 uint32_t cmdline;
54 uint32_t fdt;
55 uint32_t ima_size;
56 void *vfdt;
57} boot_info;
58
59
60static void mmubooke_create_initial_mapping(CPUState *env,
61 target_ulong va,
62 target_phys_addr_t pa)
63{
64 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
65
66 tlb->attr = 0;
67 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
68 tlb->size = 1 << 31;
69 tlb->EPN = va & TARGET_PAGE_MASK;
70 tlb->RPN = pa & TARGET_PAGE_MASK;
71 tlb->PID = 0;
72
73 tlb = &env->tlb.tlbe[1];
74 tlb->attr = 0;
75 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
76 tlb->size = 1 << 31;
77 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
78 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
79 tlb->PID = 0;
80}
81
82static CPUState *ppc440_init_xilinx(ram_addr_t *ram_size,
83 int do_init,
84 const char *cpu_model,
85 uint32_t sysclk)
86{
87 CPUState *env;
88 qemu_irq *irqs;
89
90 env = cpu_init(cpu_model);
91 if (!env) {
92 fprintf(stderr, "Unable to initialize CPU!\n");
93 exit(1);
94 }
95
96 ppc_booke_timers_init(env, sysclk, 0);
97
98 ppc_dcr_init(env, NULL, NULL);
99
100
101 irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
102 irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
103 irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
104 ppcuic_init(env, irqs, 0x0C0, 0, 1);
105 return env;
106}
107
108static void main_cpu_reset(void *opaque)
109{
110 CPUState *env = opaque;
111 struct boot_info *bi = env->load_info;
112
113 cpu_reset(env);
114
115
116
117
118
119
120
121
122
123 env->gpr[1] = (16<<20) - 8;
124
125 env->gpr[3] = bi->fdt;
126 env->nip = bi->bootstrap_pc;
127
128
129 mmubooke_create_initial_mapping(env, 0, 0);
130 env->gpr[6] = tswap32(EPAPR_MAGIC);
131 env->gpr[7] = bi->ima_size;
132}
133
134#define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
135static int xilinx_load_device_tree(target_phys_addr_t addr,
136 uint32_t ramsize,
137 target_phys_addr_t initrd_base,
138 target_phys_addr_t initrd_size,
139 const char *kernel_cmdline)
140{
141 char *path;
142 int fdt_size;
143#ifdef CONFIG_FDT
144 void *fdt;
145 int r;
146
147
148 fdt = load_device_tree("ppc.dtb", &fdt_size);
149 if (!fdt) {
150 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
151 if (path) {
152 fdt = load_device_tree(path, &fdt_size);
153 g_free(path);
154 }
155 if (!fdt) {
156 return 0;
157 }
158 }
159
160 r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
161 if (r < 0)
162 fprintf(stderr, "couldn't set /chosen/bootargs\n");
163 cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
164#else
165
166
167 fdt_size = load_image_targphys("ppc.dtb", addr, 0x10000);
168 if (fdt_size < 0) {
169 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
170 if (path) {
171 fdt_size = load_image_targphys(path, addr, 0x10000);
172 g_free(path);
173 }
174 }
175
176 if (kernel_cmdline) {
177 fprintf(stderr,
178 "Warning: missing libfdt, cannot pass cmdline to kernel!\n");
179 }
180#endif
181 return fdt_size;
182}
183
184static void virtex_init(ram_addr_t ram_size,
185 const char *boot_device,
186 const char *kernel_filename,
187 const char *kernel_cmdline,
188 const char *initrd_filename, const char *cpu_model)
189{
190 MemoryRegion *address_space_mem = get_system_memory();
191 DeviceState *dev;
192 CPUState *env;
193 target_phys_addr_t ram_base = 0;
194 DriveInfo *dinfo;
195 ram_addr_t phys_ram;
196 qemu_irq irq[32], *cpu_irq;
197 int kernel_size;
198 int i;
199
200
201 if (cpu_model == NULL) {
202 cpu_model = "440-Xilinx";
203 }
204
205 env = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
206 qemu_register_reset(main_cpu_reset, env);
207
208 phys_ram = qemu_ram_alloc(NULL, "ram", ram_size);
209 cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
210
211 dinfo = drive_get(IF_PFLASH, 0, 0);
212 pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE,
213 dinfo ? dinfo->bdrv : NULL, (64 * 1024),
214 FLASH_SIZE >> 16,
215 1, 0x89, 0x18, 0x0000, 0x0, 1);
216
217 cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
218 dev = xilinx_intc_create(0x81800000, cpu_irq[0], 0);
219 for (i = 0; i < 32; i++) {
220 irq[i] = qdev_get_gpio_in(dev, i);
221 }
222
223 serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
224 serial_hds[0], DEVICE_LITTLE_ENDIAN);
225
226
227 xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
228
229 if (kernel_filename) {
230 uint64_t entry, low, high;
231 target_phys_addr_t boot_offset;
232
233
234 kernel_size = load_elf(kernel_filename, NULL, NULL,
235 &entry, &low, &high, 1, ELF_MACHINE, 0);
236 boot_info.bootstrap_pc = entry & 0x00ffffff;
237
238 if (kernel_size < 0) {
239 boot_offset = 0x1200000;
240
241 kernel_size = load_image_targphys(kernel_filename,
242 boot_offset,
243 ram_size);
244 boot_info.bootstrap_pc = boot_offset;
245 high = boot_info.bootstrap_pc + kernel_size + 8192;
246 }
247
248 boot_info.ima_size = kernel_size;
249
250
251 boot_info.fdt = high + (8192 * 2);
252 boot_info.fdt &= ~8191;
253 xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline);
254 }
255 env->load_info = &boot_info;
256}
257
258static QEMUMachine virtex_machine = {
259 .name = "virtex-ml507",
260 .desc = "Xilinx Virtex ML507 reference design",
261 .init = virtex_init,
262};
263
264static void virtex_machine_init(void)
265{
266 qemu_register_machine(&virtex_machine);
267}
268
269machine_init(virtex_machine_init);
270