LXR qemu/trace-events

   1# Trace events for debugging and performance instrumentation
   2#
   3# This file is processed by the tracetool script during the build.
   4#
   5# To add a new trace event:
   6#
   7# 1. Choose a name for the trace event.  Declare its arguments and format
   8#    string.
   9#
  10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
  11#    trace_multiwrite_cb().  The source file must #include "trace.h".
  12#
  13# Format of a trace event:
  14#
  15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
  16#
  17# Example: g_malloc(size_t size) "size %zu"
  18#
  19# The "disable" keyword will build without the trace event.
  20#
  21# The <name> must be a valid as a C function name.
  22#
  23# Types should be standard C types.  Use void * for pointers because the trace
  24# system may not have the necessary headers included.
  25#
  26# The <format-string> should be a sprintf()-compatible format string.
  27
  28# qemu-malloc.c
  29g_malloc(size_t size, void *ptr) "size %zu ptr %p"
  30g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
  31g_free(void *ptr) "ptr %p"
  32
  33# osdep.c
  34qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
  35qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
  36qemu_vfree(void *ptr) "ptr %p"
  37
  38# hw/virtio.c
  39virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
  40virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
  41virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
  42virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
  43virtio_irq(void *vq) "vq %p"
  44virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
  45virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
  46
  47# hw/virtio-serial-bus.c
  48virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
  49virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
  50virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
  51virtio_serial_handle_control_message_port(unsigned int port) "port %u"
  52
  53# hw/virtio-console.c
  54virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
  55virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
  56virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
  57
  58# block.c
  59bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\""
  60multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
  61bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
  62bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
  63bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
  64bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
  65bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
  66bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
  67bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
  68bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d"
  69bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
  70bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
  71bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p"
  72
  73# hw/virtio-blk.c
  74virtio_blk_req_complete(void *req, int status) "req %p status %d"
  75virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
  76virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
  77
  78# posix-aio-compat.c
  79paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
  80paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
  81paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
  82
  83# ioport.c
  84cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
  85cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
  86
  87# balloon.c
  88# Since requests are raised via monitor, not many tracepoints are needed.
  89balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
  90
  91# hw/apic.c
  92apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
  93apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
  94cpu_set_apic_base(uint64_t val) "%016"PRIx64
  95cpu_get_apic_base(uint64_t val) "%016"PRIx64
  96apic_mem_readl(uint64_t addr, uint32_t val)  "%"PRIx64" = %08x"
  97apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
  98# coalescing
  99apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
 100apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
 101apic_set_irq(int apic_irq_delivered) "coalescing %d"
 102
 103# hw/cs4231.c
 104cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
 105cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
 106cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
 107cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
 108
 109# hw/ds1225y.c
 110nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
 111nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
 112
 113# hw/eccmemctl.c
 114ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
 115ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
 116ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
 117ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
 118ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
 119ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
 120ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
 121ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
 122ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
 123ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
 124ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
 125ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
 126ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
 127ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
 128ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
 129ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
 130ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
 131ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
 132
 133# hw/lance.c
 134lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
 135lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
 136
 137# hw/slavio_intctl.c
 138slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
 139slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
 140slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
 141slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
 142slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
 143slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
 144slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
 145slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
 146slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
 147slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
 148slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
 149slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
 150
 151# hw/slavio_misc.c
 152slavio_misc_update_irq_raise(void) "Raise IRQ"
 153slavio_misc_update_irq_lower(void) "Lower IRQ"
 154slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
 155slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
 156slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
 157slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
 158slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
 159slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
 160slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
 161slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
 162slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
 163slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
 164slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
 165apc_mem_writeb(uint32_t val) "Write power management %02x"
 166apc_mem_readb(uint32_t ret) "Read power management %02x"
 167slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
 168slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
 169slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
 170slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
 171
 172# hw/slavio_timer.c
 173slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
 174slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
 175slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
 176slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
 177slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
 178slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
 179slavio_timer_mem_writel_counter_invalid(void) "not user timer"
 180slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
 181slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
 182slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
 183slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
 184slavio_timer_mem_writel_mode_invalid(void) "not system timer"
 185slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
 186
 187# hw/sparc32_dma.c
 188ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
 189ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
 190sparc32_dma_set_irq_raise(void) "Raise IRQ"
 191sparc32_dma_set_irq_lower(void) "Lower IRQ"
 192espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
 193espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
 194sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
 195sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
 196sparc32_dma_enable_raise(void) "Raise DMA enable"
 197sparc32_dma_enable_lower(void) "Lower DMA enable"
 198
 199# hw/sun4m.c
 200sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
 201sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
 202sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
 203sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
 204
 205# hw/sun4m_iommu.c
 206sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
 207sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
 208sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
 209sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
 210sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
 211sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
 212sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
 213sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
 214
 215# hw/usb-bus.c
 216usb_port_claim(int bus, const char *port) "bus %d, port %s"
 217usb_port_attach(int bus, const char *port) "bus %d, port %s"
 218usb_port_detach(int bus, const char *port) "bus %d, port %s"
 219usb_port_release(int bus, const char *port) "bus %d, port %s"
 220
 221# hw/usb-ehci.c
 222usb_ehci_reset(void) "=== RESET ==="
 223usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
 224usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
 225usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
 226usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
 227usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
 228usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
 229usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
 230usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
 231usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
 232usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
 233usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
 234usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
 235usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
 236usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
 237usb_ehci_port_detach(uint32_t port) "detach port #%d"
 238usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
 239usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
 240usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
 241
 242# hw/usb-desc.c
 243usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
 244usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
 245usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
 246usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
 247usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
 248usb_set_addr(int addr) "dev %d"
 249usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
 250usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
 251usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
 252
 253# usb-linux.c
 254usb_host_open_started(int bus, int addr) "dev %d:%d"
 255usb_host_open_success(int bus, int addr) "dev %d:%d"
 256usb_host_open_failure(int bus, int addr) "dev %d:%d"
 257usb_host_disconnect(int bus, int addr) "dev %d:%d"
 258usb_host_close(int bus, int addr) "dev %d:%d"
 259usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
 260usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
 261usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
 262usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d"
 263usb_host_release_interfaces(int bus, int addr) "dev %d:%d"
 264usb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d"
 265usb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d"
 266usb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d"
 267usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d"
 268usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d"
 269usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
 270usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
 271usb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d"
 272usb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d"
 273usb_host_reset(int bus, int addr) "dev %d:%d"
 274usb_host_auto_scan_enabled(void)
 275usb_host_auto_scan_disabled(void)
 276usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d"
 277
 278# hw/scsi-bus.c
 279scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
 280scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
 281scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
 282scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
 283scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
 284scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
 285scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
 286scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
 287scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
 288scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
 289scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
 290scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
 291scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
 292
 293# vl.c
 294vm_state_notify(int running, int reason) "running %d reason %d"
 295
 296# block/qed-l2-cache.c
 297qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
 298qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
 299qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
 300
 301# block/qed-table.c
 302qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
 303qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
 304qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
 305qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
 306
 307# block/qed.c
 308qed_need_check_timer_cb(void *s) "s %p"
 309qed_start_need_check_timer(void *s) "s %p"
 310qed_cancel_need_check_timer(void *s) "s %p"
 311qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
 312qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
 313qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64
 314qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
 315qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
 316qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
 317qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
 318qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
 319
 320# hw/g364fb.c
 321g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
 322g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
 323
 324# hw/grlib_gptimer.c
 325grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
 326grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
 327grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
 328grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
 329grlib_gptimer_hit(int id) "timer:%d HIT"
 330grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
 331grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
 332
 333# hw/grlib_irqmp.c
 334grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
 335grlib_irqmp_ack(int intno) "interrupt:%d"
 336grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
 337grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
 338grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
 339
 340# hw/grlib_apbuart.c
 341grlib_apbuart_event(int event) "event:%d"
 342grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
 343
 344# hw/leon3.c
 345leon3_set_irq(int intno) "Set CPU IRQ %d"
 346leon3_reset_irq(int intno) "Reset CPU IRQ %d"
 347
 348# spice-qemu-char.c
 349spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
 350spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
 351spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
 352spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
 353
 354# hw/lm32_pic.c
 355lm32_pic_raise_irq(void) "Raise CPU interrupt"
 356lm32_pic_lower_irq(void) "Lower CPU interrupt"
 357lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
 358lm32_pic_set_im(uint32_t im) "im 0x%08x"
 359lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
 360lm32_pic_get_im(uint32_t im) "im 0x%08x"
 361lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
 362
 363# hw/lm32_juart.c
 364lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
 365lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
 366lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
 367lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
 368
 369# hw/lm32_timer.c
 370lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 371lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 372lm32_timer_hit(void) "timer hit"
 373lm32_timer_irq_state(int level) "irq state %d"
 374
 375# hw/lm32_uart.c
 376lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 377lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 378lm32_uart_irq_state(int level) "irq state %d"
 379
 380# hw/lm32_sys.c
 381lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 382
 383# hw/milkymist-ac97.c
 384milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 385milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 386milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
 387milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
 388milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
 389milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
 390milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
 391milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
 392milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
 393milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
 394
 395# hw/milkymist-hpdmc.c
 396milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
 397milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
 398
 399# hw/milkymist-memcard.c
 400milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 401milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 402
 403# hw/milkymist-minimac2.c
 404milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 405milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 406milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
 407milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
 408milkymist_minimac2_tx_frame(uint32_t length) "length %u"
 409milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
 410milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
 411milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
 412milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
 413milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
 414milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
 415
 416# hw/milkymist-pfpu.c
 417milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 418milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 419milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
 420milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
 421
 422# hw/milkymist-softusb.c
 423milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 424milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 425milkymist_softusb_mevt(uint8_t m) "m %d"
 426milkymist_softusb_kevt(uint8_t m) "m %d"
 427milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
 428milkymist_softusb_pulse_irq(void) "Pulse IRQ"
 429
 430# hw/milkymist-sysctl.c
 431milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 432milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 433milkymist_sysctl_icap_write(uint32_t value) "value %08x"
 434milkymist_sysctl_start_timer0(void) "Start timer0"
 435milkymist_sysctl_stop_timer0(void) "Stop timer0"
 436milkymist_sysctl_start_timer1(void) "Start timer1"
 437milkymist_sysctl_stop_timer1(void) "Stop timer1"
 438milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
 439milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
 440
 441# hw/milkymist-tmu2.c
 442milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 443milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 444milkymist_tmu2_start(void) "Start TMU"
 445milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
 446
 447# hw/milkymist-uart.c
 448milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 449milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 450milkymist_uart_raise_irq(void) "Raise IRQ"
 451milkymist_uart_lower_irq(void) "Lower IRQ"
 452
 453# hw/milkymist-vgafb.c
 454milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 455milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 456
 457# hw/mipsnet.c
 458mipsnet_send(uint32_t size) "sending len=%u"
 459mipsnet_receive(uint32_t size) "receiving len=%u"
 460mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
 461mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
 462mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
 463
 464# xen-all.c
 465xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
 466xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
 467
 468# xen-mapcache.c
 469xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
 470xen_remap_bucket(uint64_t index) "index %#"PRIx64
 471xen_map_cache_return(void* ptr) "%p"
 472xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64
 473xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
 474
 475# exec.c
 476qemu_put_ram_ptr(void* addr) "%p"
 477
 478# hw/xen_platform.c
 479xen_platform_log(char *s) "xen platform: %s"
 480
 481# qemu-coroutine.c
 482qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
 483qemu_coroutine_yield(void *from, void *to) "from %p to %p"
 484qemu_coroutine_terminate(void *co) "self %p"
 485
 486# qemu-coroutine-lock.c
 487qemu_co_queue_next_bh(void) ""
 488qemu_co_queue_next(void *next) "next %p"
 489qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
 490qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
 491qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
 492qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
 493
 494# hw/escc.c
 495escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
 496escc_get_queue(char channel, int val) "channel %c get 0x%02x"
 497escc_update_irq(int irq) "IRQ = %d"
 498escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
 499escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
 500escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
 501escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
 502escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
 503escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
 504escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
 505escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
 506escc_kbd_command(int val) "Command %d"
 507escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
 508
 509# block/iscsi.c
 510iscsi_aio_write10_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
 511iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
 512iscsi_aio_read10_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
 513iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
 514
 515# hw/esp.c
 516esp_raise_irq(void) "Raise IRQ"
 517esp_lower_irq(void) "Lower IRQ"
 518esp_dma_enable(void) "Raise enable"
 519esp_dma_disable(void) "Lower enable"
 520esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
 521esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
 522esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
 523esp_write_response(uint32_t status) "Transfer status (status=%d)"
 524esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
 525esp_command_complete(void) "SCSI Command complete"
 526esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
 527esp_command_complete_fail(void) "Command failed"
 528esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
 529esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
 530esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
 531esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
 532esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
 533esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
 534esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
 535esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
 536esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
 537esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
 538esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
 539esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
 540esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
 541esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
 542esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
 543esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
 544esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
 545
 546# monitor.c
 547handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
 548monitor_protocol_emitter(void *mon) "mon %p"
 549
 550# hw/opencores_eth.c
 551open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
 552open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
 553open_eth_update_irq(uint32_t v) "IRQ <- %x"
 554open_eth_receive(unsigned len) "RX: len: %u"
 555open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
 556open_eth_receive_reject(void) "RX: rejected"
 557open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
 558open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
 559open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
 560open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
 561open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
 562open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
 563
 564# hw/9pfs/virtio-9p.c
 565v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
 566v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
 567v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
 568v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
 569v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64""
 570v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 571v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
 572v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64""
 573v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
 574v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
 575v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
 576v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
 577v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
 578v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
 579v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
 580v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
 581v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 582v9fs_read(uint16_t tag, uint8_t id, int32_t fid, int64_t off, int32_t max_count) "tag %d id %d fid %d off %"PRId64" max_count %d"
 583v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
 584v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, int64_t offset, int32_t max_count) "tag %d id %d fid %d offset %"PRId64" max_count %d"
 585v9fs_readdir_return(uint16_t tag, uint8_t id, int32_t count, ssize_t retval) "tag %d id %d count %d retval %zd"
 586v9fs_write(uint16_t tag, uint8_t id, int32_t fid, int64_t off, int32_t count, int cnt) "tag %d id %d fid %d off %"PRId64" count %d cnt %d"
 587v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
 588v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
 589v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
 590v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid,  char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
 591v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
 592v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
 593v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
 594v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 595v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
 596v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
 597v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
 598v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
 599v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
 600v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
 601v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
 602v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
 603v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
 604v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
 605v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64""
 606v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
 607v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 608v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
 609
 610# target-sparc/mmu_helper.c
 611mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
 612mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
 613mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64""
 614mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64""
 615mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64""
 616mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
 617mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
 618mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
 619
 620# target-sparc/int_helper.c
 621int_helper_set_softint(uint32_t softint) "new %08x"
 622int_helper_clear_softint(uint32_t softint) "new %08x"
 623int_helper_write_softint(uint32_t softint) "new %08x"
 624int_helper_icache_freeze(void) "Instruction cache: freeze"
 625int_helper_dcache_freeze(void) "Data cache: freeze"
 626
 627# target-sparc/win_helper.c
 628win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
 629win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
 630win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
 631win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
 632win_helper_done(uint32_t tl) "tl=%d"
 633win_helper_retry(uint32_t tl) "tl=%d"
 634