1/* 2 * QEMU Emulated HPET support 3 * 4 * Copyright IBM, Corp. 2008 5 * 6 * Authors: 7 * Beth Kon <bkon@us.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2. See 10 * the COPYING file in the top-level directory. 11 * 12 */ 13#ifndef QEMU_HPET_EMUL_H 14#define QEMU_HPET_EMUL_H 15 16#define HPET_BASE 0xfed00000 17#define HPET_CLK_PERIOD 10000000ULL /* 10000000 femtoseconds == 10ns*/ 18 19#define FS_PER_NS 1000000 20#define HPET_MIN_TIMERS 3 21#define HPET_MAX_TIMERS 32 22 23#define HPET_NUM_IRQ_ROUTES 32 24 25#define HPET_LEGACY_PIT_INT 0 26#define HPET_LEGACY_RTC_INT 1 27 28#define HPET_CFG_ENABLE 0x001 29#define HPET_CFG_LEGACY 0x002 30 31#define HPET_ID 0x000 32#define HPET_PERIOD 0x004 33#define HPET_CFG 0x010 34#define HPET_STATUS 0x020 35#define HPET_COUNTER 0x0f0 36#define HPET_TN_CFG 0x000 37#define HPET_TN_CMP 0x008 38#define HPET_TN_ROUTE 0x010 39#define HPET_CFG_WRITE_MASK 0x3 40 41#define HPET_ID_NUM_TIM_SHIFT 8 42#define HPET_ID_NUM_TIM_MASK 0x1f00 43 44#define HPET_TN_TYPE_LEVEL 0x002 45#define HPET_TN_ENABLE 0x004 46#define HPET_TN_PERIODIC 0x008 47#define HPET_TN_PERIODIC_CAP 0x010 48#define HPET_TN_SIZE_CAP 0x020 49#define HPET_TN_SETVAL 0x040 50#define HPET_TN_32BIT 0x100 51#define HPET_TN_INT_ROUTE_MASK 0x3e00 52#define HPET_TN_FSB_ENABLE 0x4000 53#define HPET_TN_FSB_CAP 0x8000 54#define HPET_TN_CFG_WRITE_MASK 0x7f4e 55#define HPET_TN_INT_ROUTE_SHIFT 9 56#define HPET_TN_INT_ROUTE_CAP_SHIFT 32 57#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U 58 59struct hpet_fw_entry 60{ 61 uint32_t event_timer_block_id; 62 uint64_t address; 63 uint16_t min_tick; 64 uint8_t page_prot; 65} QEMU_PACKED; 66 67struct hpet_fw_config 68{ 69 uint8_t count; 70 struct hpet_fw_entry hpet[8]; 71} QEMU_PACKED; 72 73extern struct hpet_fw_config hpet_cfg; 74#endif 75