LXR qemu/hw/i82374.c

   1/*
   2 * QEMU Intel 82374 emulation (Enhanced DMA controller)
   3 *
   4 * Copyright (c) 2010 Hervé Poussineau
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#include "isa.h"
  26
  27//#define DEBUG_I82374
  28
  29#ifdef DEBUG_I82374
  30#define DPRINTF(fmt, ...) \
  31do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
  32#else
  33#define DPRINTF(fmt, ...) \
  34do {} while (0)
  35#endif
  36#define BADF(fmt, ...) \
  37do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
  38
  39typedef struct I82374State {
  40    uint8_t commands[8];
  41    qemu_irq out;
  42} I82374State;
  43
  44static const VMStateDescription vmstate_i82374 = {
  45    .name = "i82374",
  46    .version_id = 0,
  47    .minimum_version_id = 0,
  48    .fields = (VMStateField[]) {
  49        VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
  50        VMSTATE_END_OF_LIST()
  51    },
  52};
  53
  54static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
  55{
  56    uint32_t val = 0;
  57
  58    BADF("%s: %08x\n", __func__, nport);
  59
  60    DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  61    return val;
  62}
  63
  64static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
  65{
  66    DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  67
  68    if (data != 0x42) {
  69        /* Not Stop S/G command */
  70        BADF("%s: %08x=%08x\n", __func__, nport, data);
  71    }
  72}
  73
  74static uint32_t i82374_read_status(void *opaque, uint32_t nport)
  75{
  76    uint32_t val = 0;
  77
  78    BADF("%s: %08x\n", __func__, nport);
  79
  80    DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  81    return val;
  82}
  83
  84static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
  85{
  86    DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
  87
  88    BADF("%s: %08x=%08x\n", __func__, nport, data);
  89}
  90
  91static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
  92{
  93    uint32_t val = 0;
  94
  95    BADF("%s: %08x\n", __func__, nport);
  96
  97    DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
  98    return val;
  99}
 100
 101static void i82374_init(I82374State *s)
 102{
 103    DMA_init(1, &s->out);
 104    memset(s->commands, 0, sizeof(s->commands));
 105}
 106
 107typedef struct ISAi82374State {
 108    ISADevice dev;
 109    uint32_t iobase;
 110    I82374State state;
 111} ISAi82374State;
 112
 113static const VMStateDescription vmstate_isa_i82374 = {
 114    .name = "isa-i82374",
 115    .version_id = 0,
 116    .minimum_version_id = 0,
 117    .fields = (VMStateField[]) {
 118        VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State),
 119        VMSTATE_END_OF_LIST()
 120    },
 121};
 122
 123static int i82374_isa_init(ISADevice *dev)
 124{
 125    ISAi82374State *isa = DO_UPCAST(ISAi82374State, dev, dev);
 126    I82374State *s = &isa->state;
 127
 128    register_ioport_read(isa->iobase + 0x0A, 1, 1, i82374_read_isr, s);
 129    register_ioport_write(isa->iobase + 0x10, 8, 1, i82374_write_command, s);
 130    register_ioport_read(isa->iobase + 0x18, 8, 1, i82374_read_status, s);
 131    register_ioport_write(isa->iobase + 0x20, 0x20, 1, i82374_write_descriptor, s);
 132    register_ioport_read(isa->iobase + 0x20, 0x20, 1, i82374_read_descriptor, s);
 133
 134    i82374_init(s);
 135
 136    qdev_init_gpio_out(&dev->qdev, &s->out, 1);
 137
 138    return 0;
 139}
 140
 141static Property i82374_properties[] = {
 142    DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400),
 143    DEFINE_PROP_END_OF_LIST()
 144};
 145
 146static void i82374_class_init(ObjectClass *klass, void *data)
 147{
 148    ISADeviceClass *k = ISA_DEVICE_CLASS(klass);
 149    DeviceClass *dc = DEVICE_CLASS(klass);
 150    
 151    k->init  = i82374_isa_init;
 152    dc->vmsd = &vmstate_isa_i82374;
 153    dc->props = i82374_properties;
 154}
 155
 156static TypeInfo i82374_isa_info = {
 157    .name  = "i82374",
 158    .parent = TYPE_ISA_DEVICE,
 159    .instance_size  = sizeof(ISAi82374State),
 160    .class_init = i82374_class_init,
 161};
 162
 163static void i82374_register_types(void)
 164{
 165    type_register_static(&i82374_isa_info);
 166}
 167
 168type_init(i82374_register_types)
 169