LXR qemu/hw/blizzard.c

   1/*
   2 * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller.
   3 *
   4 * Copyright (C) 2008 Nokia Corporation
   5 * Written by Andrzej Zaborowski <andrew@openedhand.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 or
  10 * (at your option) version 3 of the License.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License along
  18 * with this program; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20
  21#include "qemu-common.h"
  22#include "ui/console.h"
  23#include "devices.h"
  24#include "vga_int.h"
  25#include "ui/pixel_ops.h"
  26
  27typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
  28
  29typedef struct {
  30    uint8_t reg;
  31    uint32_t addr;
  32    int swallow;
  33
  34    int pll;
  35    int pll_range;
  36    int pll_ctrl;
  37    uint8_t pll_mode;
  38    uint8_t clksel;
  39    int memenable;
  40    int memrefresh;
  41    uint8_t timing[3];
  42    int priority;
  43
  44    uint8_t lcd_config;
  45    int x;
  46    int y;
  47    int skipx;
  48    int skipy;
  49    uint8_t hndp;
  50    uint8_t vndp;
  51    uint8_t hsync;
  52    uint8_t vsync;
  53    uint8_t pclk;
  54    uint8_t u;
  55    uint8_t v;
  56    uint8_t yrc[2];
  57    int ix[2];
  58    int iy[2];
  59    int ox[2];
  60    int oy[2];
  61
  62    int enable;
  63    int blank;
  64    int bpp;
  65    int invalidate;
  66    int mx[2];
  67    int my[2];
  68    uint8_t mode;
  69    uint8_t effect;
  70    uint8_t iformat;
  71    uint8_t source;
  72    DisplayState *state;
  73    blizzard_fn_t *line_fn_tab[2];
  74    void *fb;
  75
  76    uint8_t hssi_config[3];
  77    uint8_t tv_config;
  78    uint8_t tv_timing[4];
  79    uint8_t vbi;
  80    uint8_t tv_x;
  81    uint8_t tv_y;
  82    uint8_t tv_test;
  83    uint8_t tv_filter_config;
  84    uint8_t tv_filter_idx;
  85    uint8_t tv_filter_coeff[0x20];
  86    uint8_t border_r;
  87    uint8_t border_g;
  88    uint8_t border_b;
  89    uint8_t gamma_config;
  90    uint8_t gamma_idx;
  91    uint8_t gamma_lut[0x100];
  92    uint8_t matrix_ena;
  93    uint8_t matrix_coeff[0x12];
  94    uint8_t matrix_r;
  95    uint8_t matrix_g;
  96    uint8_t matrix_b;
  97    uint8_t pm;
  98    uint8_t status;
  99    uint8_t rgbgpio_dir;
 100    uint8_t rgbgpio;
 101    uint8_t gpio_dir;
 102    uint8_t gpio;
 103    uint8_t gpio_edge[2];
 104    uint8_t gpio_irq;
 105    uint8_t gpio_pdown;
 106
 107    struct {
 108        int x;
 109        int y;
 110        int dx;
 111        int dy;
 112        int len;
 113        int buflen;
 114        void *buf;
 115        void *data;
 116        uint16_t *ptr;
 117        int angle;
 118        int pitch;
 119        blizzard_fn_t line_fn;
 120    } data;
 121} BlizzardState;
 122
 123/* Bytes(!) per pixel */
 124static const int blizzard_iformat_bpp[0x10] = {
 125    0,
 126    2,  /* RGB 5:6:5*/
 127    3,  /* RGB 6:6:6 mode 1 */
 128    3,  /* RGB 8:8:8 mode 1 */
 129    0, 0,
 130    4,  /* RGB 6:6:6 mode 2 */
 131    4,  /* RGB 8:8:8 mode 2 */
 132    0,  /* YUV 4:2:2 */
 133    0,  /* YUV 4:2:0 */
 134    0, 0, 0, 0, 0, 0,
 135};
 136
 137static inline void blizzard_rgb2yuv(int r, int g, int b,
 138                int *y, int *u, int *v)
 139{
 140    *y = 0x10 + ((0x838 * r + 0x1022 * g + 0x322 * b) >> 13);
 141    *u = 0x80 + ((0xe0e * b - 0x04c1 * r - 0x94e * g) >> 13);
 142    *v = 0x80 + ((0xe0e * r - 0x0bc7 * g - 0x247 * b) >> 13);
 143}
 144
 145static void blizzard_window(BlizzardState *s)
 146{
 147    uint8_t *src, *dst;
 148    int bypp[2];
 149    int bypl[3];
 150    int y;
 151    blizzard_fn_t fn = s->data.line_fn;
 152
 153    if (!fn)
 154        return;
 155    if (s->mx[0] > s->data.x)
 156        s->mx[0] = s->data.x;
 157    if (s->my[0] > s->data.y)
 158        s->my[0] = s->data.y;
 159    if (s->mx[1] < s->data.x + s->data.dx)
 160        s->mx[1] = s->data.x + s->data.dx;
 161    if (s->my[1] < s->data.y + s->data.dy)
 162        s->my[1] = s->data.y + s->data.dy;
 163
 164    bypp[0] = s->bpp;
 165    bypp[1] = (ds_get_bits_per_pixel(s->state) + 7) >> 3;
 166    bypl[0] = bypp[0] * s->data.pitch;
 167    bypl[1] = bypp[1] * s->x;
 168    bypl[2] = bypp[0] * s->data.dx;
 169
 170    src = s->data.data;
 171    dst = s->fb + bypl[1] * s->data.y + bypp[1] * s->data.x;
 172    for (y = s->data.dy; y > 0; y --, src += bypl[0], dst += bypl[1])
 173        fn(dst, src, bypl[2]);
 174}
 175
 176static int blizzard_transfer_setup(BlizzardState *s)
 177{
 178    if (s->source > 3 || !s->bpp ||
 179                    s->ix[1] < s->ix[0] || s->iy[1] < s->iy[0])
 180        return 0;
 181
 182    s->data.angle = s->effect & 3;
 183    s->data.line_fn = s->line_fn_tab[!!s->data.angle][s->iformat];
 184    s->data.x = s->ix[0];
 185    s->data.y = s->iy[0];
 186    s->data.dx = s->ix[1] - s->ix[0] + 1;
 187    s->data.dy = s->iy[1] - s->iy[0] + 1;
 188    s->data.len = s->bpp * s->data.dx * s->data.dy;
 189    s->data.pitch = s->data.dx;
 190    if (s->data.len > s->data.buflen) {
 191        s->data.buf = g_realloc(s->data.buf, s->data.len);
 192        s->data.buflen = s->data.len;
 193    }
 194    s->data.ptr = s->data.buf;
 195    s->data.data = s->data.buf;
 196    s->data.len /= 2;
 197    return 1;
 198}
 199
 200static void blizzard_reset(BlizzardState *s)
 201{
 202    s->reg = 0;
 203    s->swallow = 0;
 204
 205    s->pll = 9;
 206    s->pll_range = 1;
 207    s->pll_ctrl = 0x14;
 208    s->pll_mode = 0x32;
 209    s->clksel = 0x00;
 210    s->memenable = 0;
 211    s->memrefresh = 0x25c;
 212    s->timing[0] = 0x3f;
 213    s->timing[1] = 0x13;
 214    s->timing[2] = 0x21;
 215    s->priority = 0;
 216
 217    s->lcd_config = 0x74;
 218    s->x = 8;
 219    s->y = 1;
 220    s->skipx = 0;
 221    s->skipy = 0;
 222    s->hndp = 3;
 223    s->vndp = 2;
 224    s->hsync = 1;
 225    s->vsync = 1;
 226    s->pclk = 0x80;
 227
 228    s->ix[0] = 0;
 229    s->ix[1] = 0;
 230    s->iy[0] = 0;
 231    s->iy[1] = 0;
 232    s->ox[0] = 0;
 233    s->ox[1] = 0;
 234    s->oy[0] = 0;
 235    s->oy[1] = 0;
 236
 237    s->yrc[0] = 0x00;
 238    s->yrc[1] = 0x30;
 239    s->u = 0;
 240    s->v = 0;
 241
 242    s->iformat = 3;
 243    s->source = 0;
 244    s->bpp = blizzard_iformat_bpp[s->iformat];
 245
 246    s->hssi_config[0] = 0x00;
 247    s->hssi_config[1] = 0x00;
 248    s->hssi_config[2] = 0x01;
 249    s->tv_config = 0x00;
 250    s->tv_timing[0] = 0x00;
 251    s->tv_timing[1] = 0x00;
 252    s->tv_timing[2] = 0x00;
 253    s->tv_timing[3] = 0x00;
 254    s->vbi = 0x10;
 255    s->tv_x = 0x14;
 256    s->tv_y = 0x03;
 257    s->tv_test = 0x00;
 258    s->tv_filter_config = 0x80;
 259    s->tv_filter_idx = 0x00;
 260    s->border_r = 0x10;
 261    s->border_g = 0x80;
 262    s->border_b = 0x80;
 263    s->gamma_config = 0x00;
 264    s->gamma_idx = 0x00;
 265    s->matrix_ena = 0x00;
 266    memset(&s->matrix_coeff, 0, sizeof(s->matrix_coeff));
 267    s->matrix_r = 0x00;
 268    s->matrix_g = 0x00;
 269    s->matrix_b = 0x00;
 270    s->pm = 0x02;
 271    s->status = 0x00;
 272    s->rgbgpio_dir = 0x00;
 273    s->gpio_dir = 0x00;
 274    s->gpio_edge[0] = 0x00;
 275    s->gpio_edge[1] = 0x00;
 276    s->gpio_irq = 0x00;
 277    s->gpio_pdown = 0xff;
 278}
 279
 280static inline void blizzard_invalidate_display(void *opaque) {
 281    BlizzardState *s = (BlizzardState *) opaque;
 282
 283    s->invalidate = 1;
 284}
 285
 286static uint16_t blizzard_reg_read(void *opaque, uint8_t reg)
 287{
 288    BlizzardState *s = (BlizzardState *) opaque;
 289
 290    switch (reg) {
 291    case 0x00:  /* Revision Code */
 292        return 0xa5;
 293
 294    case 0x02:  /* Configuration Readback */
 295        return 0x83;    /* Macrovision OK, CNF[2:0] = 3 */
 296
 297    case 0x04:  /* PLL M-Divider */
 298        return (s->pll - 1) | (1 << 7);
 299    case 0x06:  /* PLL Lock Range Control */
 300        return s->pll_range;
 301    case 0x08:  /* PLL Lock Synthesis Control 0 */
 302        return s->pll_ctrl & 0xff;
 303    case 0x0a:  /* PLL Lock Synthesis Control 1 */
 304        return s->pll_ctrl >> 8;
 305    case 0x0c:  /* PLL Mode Control 0 */
 306        return s->pll_mode;
 307
 308    case 0x0e:  /* Clock-Source Select */
 309        return s->clksel;
 310
 311    case 0x10:  /* Memory Controller Activate */
 312    case 0x14:  /* Memory Controller Bank 0 Status Flag */
 313        return s->memenable;
 314
 315    case 0x18:  /* Auto-Refresh Interval Setting 0 */
 316        return s->memrefresh & 0xff;
 317    case 0x1a:  /* Auto-Refresh Interval Setting 1 */
 318        return s->memrefresh >> 8;
 319
 320    case 0x1c:  /* Power-On Sequence Timing Control */
 321        return s->timing[0];
 322    case 0x1e:  /* Timing Control 0 */
 323        return s->timing[1];
 324    case 0x20:  /* Timing Control 1 */
 325        return s->timing[2];
 326
 327    case 0x24:  /* Arbitration Priority Control */
 328        return s->priority;
 329
 330    case 0x28:  /* LCD Panel Configuration */
 331        return s->lcd_config;
 332
 333    case 0x2a:  /* LCD Horizontal Display Width */
 334        return s->x >> 3;
 335    case 0x2c:  /* LCD Horizontal Non-display Period */
 336        return s->hndp;
 337    case 0x2e:  /* LCD Vertical Display Height 0 */
 338        return s->y & 0xff;
 339    case 0x30:  /* LCD Vertical Display Height 1 */
 340        return s->y >> 8;
 341    case 0x32:  /* LCD Vertical Non-display Period */
 342        return s->vndp;
 343    case 0x34:  /* LCD HS Pulse-width */
 344        return s->hsync;
 345    case 0x36:  /* LCd HS Pulse Start Position */
 346        return s->skipx >> 3;
 347    case 0x38:  /* LCD VS Pulse-width */
 348        return s->vsync;
 349    case 0x3a:  /* LCD VS Pulse Start Position */
 350        return s->skipy;
 351
 352    case 0x3c:  /* PCLK Polarity */
 353        return s->pclk;
 354
 355    case 0x3e:  /* High-speed Serial Interface Tx Configuration Port 0 */
 356        return s->hssi_config[0];
 357    case 0x40:  /* High-speed Serial Interface Tx Configuration Port 1 */
 358        return s->hssi_config[1];
 359    case 0x42:  /* High-speed Serial Interface Tx Mode */
 360        return s->hssi_config[2];
 361    case 0x44:  /* TV Display Configuration */
 362        return s->tv_config;
 363    case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits */
 364        return s->tv_timing[(reg - 0x46) >> 1];
 365    case 0x4e:  /* VBI: Closed Caption / XDS Control / Status */
 366        return s->vbi;
 367    case 0x50:  /* TV Horizontal Start Position */
 368        return s->tv_x;
 369    case 0x52:  /* TV Vertical Start Position */
 370        return s->tv_y;
 371    case 0x54:  /* TV Test Pattern Setting */
 372        return s->tv_test;
 373    case 0x56:  /* TV Filter Setting */
 374        return s->tv_filter_config;
 375    case 0x58:  /* TV Filter Coefficient Index */
 376        return s->tv_filter_idx;
 377    case 0x5a:  /* TV Filter Coefficient Data */
 378        if (s->tv_filter_idx < 0x20)
 379            return s->tv_filter_coeff[s->tv_filter_idx ++];
 380        return 0;
 381
 382    case 0x60:  /* Input YUV/RGB Translate Mode 0 */
 383        return s->yrc[0];
 384    case 0x62:  /* Input YUV/RGB Translate Mode 1 */
 385        return s->yrc[1];
 386    case 0x64:  /* U Data Fix */
 387        return s->u;
 388    case 0x66:  /* V Data Fix */
 389        return s->v;
 390
 391    case 0x68:  /* Display Mode */
 392        return s->mode;
 393
 394    case 0x6a:  /* Special Effects */
 395        return s->effect;
 396
 397    case 0x6c:  /* Input Window X Start Position 0 */
 398        return s->ix[0] & 0xff;
 399    case 0x6e:  /* Input Window X Start Position 1 */
 400        return s->ix[0] >> 3;
 401    case 0x70:  /* Input Window Y Start Position 0 */
 402        return s->ix[0] & 0xff;
 403    case 0x72:  /* Input Window Y Start Position 1 */
 404        return s->ix[0] >> 3;
 405    case 0x74:  /* Input Window X End Position 0 */
 406        return s->ix[1] & 0xff;
 407    case 0x76:  /* Input Window X End Position 1 */
 408        return s->ix[1] >> 3;
 409    case 0x78:  /* Input Window Y End Position 0 */
 410        return s->ix[1] & 0xff;
 411    case 0x7a:  /* Input Window Y End Position 1 */
 412        return s->ix[1] >> 3;
 413    case 0x7c:  /* Output Window X Start Position 0 */
 414        return s->ox[0] & 0xff;
 415    case 0x7e:  /* Output Window X Start Position 1 */
 416        return s->ox[0] >> 3;
 417    case 0x80:  /* Output Window Y Start Position 0 */
 418        return s->oy[0] & 0xff;
 419    case 0x82:  /* Output Window Y Start Position 1 */
 420        return s->oy[0] >> 3;
 421    case 0x84:  /* Output Window X End Position 0 */
 422        return s->ox[1] & 0xff;
 423    case 0x86:  /* Output Window X End Position 1 */
 424        return s->ox[1] >> 3;
 425    case 0x88:  /* Output Window Y End Position 0 */
 426        return s->oy[1] & 0xff;
 427    case 0x8a:  /* Output Window Y End Position 1 */
 428        return s->oy[1] >> 3;
 429
 430    case 0x8c:  /* Input Data Format */
 431        return s->iformat;
 432    case 0x8e:  /* Data Source Select */
 433        return s->source;
 434    case 0x90:  /* Display Memory Data Port */
 435        return 0;
 436
 437    case 0xa8:  /* Border Color 0 */
 438        return s->border_r;
 439    case 0xaa:  /* Border Color 1 */
 440        return s->border_g;
 441    case 0xac:  /* Border Color 2 */
 442        return s->border_b;
 443
 444    case 0xb4:  /* Gamma Correction Enable */
 445        return s->gamma_config;
 446    case 0xb6:  /* Gamma Correction Table Index */
 447        return s->gamma_idx;
 448    case 0xb8:  /* Gamma Correction Table Data */
 449        return s->gamma_lut[s->gamma_idx ++];
 450
 451    case 0xba:  /* 3x3 Matrix Enable */
 452        return s->matrix_ena;
 453    case 0xbc ... 0xde: /* Coefficient Registers */
 454        return s->matrix_coeff[(reg - 0xbc) >> 1];
 455    case 0xe0:  /* 3x3 Matrix Red Offset */
 456        return s->matrix_r;
 457    case 0xe2:  /* 3x3 Matrix Green Offset */
 458        return s->matrix_g;
 459    case 0xe4:  /* 3x3 Matrix Blue Offset */
 460        return s->matrix_b;
 461
 462    case 0xe6:  /* Power-save */
 463        return s->pm;
 464    case 0xe8:  /* Non-display Period Control / Status */
 465        return s->status | (1 << 5);
 466    case 0xea:  /* RGB Interface Control */
 467        return s->rgbgpio_dir;
 468    case 0xec:  /* RGB Interface Status */
 469        return s->rgbgpio;
 470    case 0xee:  /* General-purpose IO Pins Configuration */
 471        return s->gpio_dir;
 472    case 0xf0:  /* General-purpose IO Pins Status / Control */
 473        return s->gpio;
 474    case 0xf2:  /* GPIO Positive Edge Interrupt Trigger */
 475        return s->gpio_edge[0];
 476    case 0xf4:  /* GPIO Negative Edge Interrupt Trigger */
 477        return s->gpio_edge[1];
 478    case 0xf6:  /* GPIO Interrupt Status */
 479        return s->gpio_irq;
 480    case 0xf8:  /* GPIO Pull-down Control */
 481        return s->gpio_pdown;
 482
 483    default:
 484        fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg);
 485        return 0;
 486    }
 487}
 488
 489static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
 490{
 491    BlizzardState *s = (BlizzardState *) opaque;
 492
 493    switch (reg) {
 494    case 0x04:  /* PLL M-Divider */
 495        s->pll = (value & 0x3f) + 1;
 496        break;
 497    case 0x06:  /* PLL Lock Range Control */
 498        s->pll_range = value & 3;
 499        break;
 500    case 0x08:  /* PLL Lock Synthesis Control 0 */
 501        s->pll_ctrl &= 0xf00;
 502        s->pll_ctrl |= (value << 0) & 0x0ff;
 503        break;
 504    case 0x0a:  /* PLL Lock Synthesis Control 1 */
 505        s->pll_ctrl &= 0x0ff;
 506        s->pll_ctrl |= (value << 8) & 0xf00;
 507        break;
 508    case 0x0c:  /* PLL Mode Control 0 */
 509        s->pll_mode = value & 0x77;
 510        if ((value & 3) == 0 || (value & 3) == 3)
 511            fprintf(stderr, "%s: wrong PLL Control bits (%i)\n",
 512                    __FUNCTION__, value & 3);
 513        break;
 514
 515    case 0x0e:  /* Clock-Source Select */
 516        s->clksel = value & 0xff;
 517        break;
 518
 519    case 0x10:  /* Memory Controller Activate */
 520        s->memenable = value & 1;
 521        break;
 522    case 0x14:  /* Memory Controller Bank 0 Status Flag */
 523        break;
 524
 525    case 0x18:  /* Auto-Refresh Interval Setting 0 */
 526        s->memrefresh &= 0xf00;
 527        s->memrefresh |= (value << 0) & 0x0ff;
 528        break;
 529    case 0x1a:  /* Auto-Refresh Interval Setting 1 */
 530        s->memrefresh &= 0x0ff;
 531        s->memrefresh |= (value << 8) & 0xf00;
 532        break;
 533
 534    case 0x1c:  /* Power-On Sequence Timing Control */
 535        s->timing[0] = value & 0x7f;
 536        break;
 537    case 0x1e:  /* Timing Control 0 */
 538        s->timing[1] = value & 0x17;
 539        break;
 540    case 0x20:  /* Timing Control 1 */
 541        s->timing[2] = value & 0x35;
 542        break;
 543
 544    case 0x24:  /* Arbitration Priority Control */
 545        s->priority = value & 1;
 546        break;
 547
 548    case 0x28:  /* LCD Panel Configuration */
 549        s->lcd_config = value & 0xff;
 550        if (value & (1 << 7))
 551            fprintf(stderr, "%s: data swap not supported!\n", __FUNCTION__);
 552        break;
 553
 554    case 0x2a:  /* LCD Horizontal Display Width */
 555        s->x = value << 3;
 556        break;
 557    case 0x2c:  /* LCD Horizontal Non-display Period */
 558        s->hndp = value & 0xff;
 559        break;
 560    case 0x2e:  /* LCD Vertical Display Height 0 */
 561        s->y &= 0x300;
 562        s->y |= (value << 0) & 0x0ff;
 563        break;
 564    case 0x30:  /* LCD Vertical Display Height 1 */
 565        s->y &= 0x0ff;
 566        s->y |= (value << 8) & 0x300;
 567        break;
 568    case 0x32:  /* LCD Vertical Non-display Period */
 569        s->vndp = value & 0xff;
 570        break;
 571    case 0x34:  /* LCD HS Pulse-width */
 572        s->hsync = value & 0xff;
 573        break;
 574    case 0x36:  /* LCD HS Pulse Start Position */
 575        s->skipx = value & 0xff;
 576        break;
 577    case 0x38:  /* LCD VS Pulse-width */
 578        s->vsync = value & 0xbf;
 579        break;
 580    case 0x3a:  /* LCD VS Pulse Start Position */
 581        s->skipy = value & 0xff;
 582        break;
 583
 584    case 0x3c:  /* PCLK Polarity */
 585        s->pclk = value & 0x82;
 586        /* Affects calculation of s->hndp, s->hsync and s->skipx.  */
 587        break;
 588
 589    case 0x3e:  /* High-speed Serial Interface Tx Configuration Port 0 */
 590        s->hssi_config[0] = value;
 591        break;
 592    case 0x40:  /* High-speed Serial Interface Tx Configuration Port 1 */
 593        s->hssi_config[1] = value;
 594        if (((value >> 4) & 3) == 3)
 595            fprintf(stderr, "%s: Illegal active-data-links value\n",
 596                            __FUNCTION__);
 597        break;
 598    case 0x42:  /* High-speed Serial Interface Tx Mode */
 599        s->hssi_config[2] = value & 0xbd;
 600        break;
 601
 602    case 0x44:  /* TV Display Configuration */
 603        s->tv_config = value & 0xfe;
 604        break;
 605    case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits 0 */
 606        s->tv_timing[(reg - 0x46) >> 1] = value;
 607        break;
 608    case 0x4e:  /* VBI: Closed Caption / XDS Control / Status */
 609        s->vbi = value;
 610        break;
 611    case 0x50:  /* TV Horizontal Start Position */
 612        s->tv_x = value;
 613        break;
 614    case 0x52:  /* TV Vertical Start Position */
 615        s->tv_y = value & 0x7f;
 616        break;
 617    case 0x54:  /* TV Test Pattern Setting */
 618        s->tv_test = value;
 619        break;
 620    case 0x56:  /* TV Filter Setting */
 621        s->tv_filter_config = value & 0xbf;
 622        break;
 623    case 0x58:  /* TV Filter Coefficient Index */
 624        s->tv_filter_idx = value & 0x1f;
 625        break;
 626    case 0x5a:  /* TV Filter Coefficient Data */
 627        if (s->tv_filter_idx < 0x20)
 628            s->tv_filter_coeff[s->tv_filter_idx ++] = value;
 629        break;
 630
 631    case 0x60:  /* Input YUV/RGB Translate Mode 0 */
 632        s->yrc[0] = value & 0xb0;
 633        break;
 634    case 0x62:  /* Input YUV/RGB Translate Mode 1 */
 635        s->yrc[1] = value & 0x30;
 636        break;
 637    case 0x64:  /* U Data Fix */
 638        s->u = value & 0xff;
 639        break;
 640    case 0x66:  /* V Data Fix */
 641        s->v = value & 0xff;
 642        break;
 643
 644    case 0x68:  /* Display Mode */
 645        if ((s->mode ^ value) & 3)
 646            s->invalidate = 1;
 647        s->mode = value & 0xb7;
 648        s->enable = value & 1;
 649        s->blank = (value >> 1) & 1;
 650        if (value & (1 << 4))
 651            fprintf(stderr, "%s: Macrovision enable attempt!\n", __FUNCTION__);
 652        break;
 653
 654    case 0x6a:  /* Special Effects */
 655        s->effect = value & 0xfb;
 656        break;
 657
 658    case 0x6c:  /* Input Window X Start Position 0 */
 659        s->ix[0] &= 0x300;
 660        s->ix[0] |= (value << 0) & 0x0ff;
 661        break;
 662    case 0x6e:  /* Input Window X Start Position 1 */
 663        s->ix[0] &= 0x0ff;
 664        s->ix[0] |= (value << 8) & 0x300;
 665        break;
 666    case 0x70:  /* Input Window Y Start Position 0 */
 667        s->iy[0] &= 0x300;
 668        s->iy[0] |= (value << 0) & 0x0ff;
 669        break;
 670    case 0x72:  /* Input Window Y Start Position 1 */
 671        s->iy[0] &= 0x0ff;
 672        s->iy[0] |= (value << 8) & 0x300;
 673        break;
 674    case 0x74:  /* Input Window X End Position 0 */
 675        s->ix[1] &= 0x300;
 676        s->ix[1] |= (value << 0) & 0x0ff;
 677        break;
 678    case 0x76:  /* Input Window X End Position 1 */
 679        s->ix[1] &= 0x0ff;
 680        s->ix[1] |= (value << 8) & 0x300;
 681        break;
 682    case 0x78:  /* Input Window Y End Position 0 */
 683        s->iy[1] &= 0x300;
 684        s->iy[1] |= (value << 0) & 0x0ff;
 685        break;
 686    case 0x7a:  /* Input Window Y End Position 1 */
 687        s->iy[1] &= 0x0ff;
 688        s->iy[1] |= (value << 8) & 0x300;
 689        break;
 690    case 0x7c:  /* Output Window X Start Position 0 */
 691        s->ox[0] &= 0x300;
 692        s->ox[0] |= (value << 0) & 0x0ff;
 693        break;
 694    case 0x7e:  /* Output Window X Start Position 1 */
 695        s->ox[0] &= 0x0ff;
 696        s->ox[0] |= (value << 8) & 0x300;
 697        break;
 698    case 0x80:  /* Output Window Y Start Position 0 */
 699        s->oy[0] &= 0x300;
 700        s->oy[0] |= (value << 0) & 0x0ff;
 701        break;
 702    case 0x82:  /* Output Window Y Start Position 1 */
 703        s->oy[0] &= 0x0ff;
 704        s->oy[0] |= (value << 8) & 0x300;
 705        break;
 706    case 0x84:  /* Output Window X End Position 0 */
 707        s->ox[1] &= 0x300;
 708        s->ox[1] |= (value << 0) & 0x0ff;
 709        break;
 710    case 0x86:  /* Output Window X End Position 1 */
 711        s->ox[1] &= 0x0ff;
 712        s->ox[1] |= (value << 8) & 0x300;
 713        break;
 714    case 0x88:  /* Output Window Y End Position 0 */
 715        s->oy[1] &= 0x300;
 716        s->oy[1] |= (value << 0) & 0x0ff;
 717        break;
 718    case 0x8a:  /* Output Window Y End Position 1 */
 719        s->oy[1] &= 0x0ff;
 720        s->oy[1] |= (value << 8) & 0x300;
 721        break;
 722
 723    case 0x8c:  /* Input Data Format */
 724        s->iformat = value & 0xf;
 725        s->bpp = blizzard_iformat_bpp[s->iformat];
 726        if (!s->bpp)
 727            fprintf(stderr, "%s: Illegal or unsupported input format %x\n",
 728                            __FUNCTION__, s->iformat);
 729        break;
 730    case 0x8e:  /* Data Source Select */
 731        s->source = value & 7;
 732        /* Currently all windows will be "destructive overlays".  */
 733        if ((!(s->effect & (1 << 3)) && (s->ix[0] != s->ox[0] ||
 734                                        s->iy[0] != s->oy[0] ||
 735                                        s->ix[1] != s->ox[1] ||
 736                                        s->iy[1] != s->oy[1])) ||
 737                        !((s->ix[1] - s->ix[0]) & (s->iy[1] - s->iy[0]) &
 738                          (s->ox[1] - s->ox[0]) & (s->oy[1] - s->oy[0]) & 1))
 739            fprintf(stderr, "%s: Illegal input/output window positions\n",
 740                            __FUNCTION__);
 741
 742        blizzard_transfer_setup(s);
 743        break;
 744
 745    case 0x90:  /* Display Memory Data Port */
 746        if (!s->data.len && !blizzard_transfer_setup(s))
 747            break;
 748
 749        *s->data.ptr ++ = value;
 750        if (-- s->data.len == 0)
 751            blizzard_window(s);
 752        break;
 753
 754    case 0xa8:  /* Border Color 0 */
 755        s->border_r = value;
 756        break;
 757    case 0xaa:  /* Border Color 1 */
 758        s->border_g = value;
 759        break;
 760    case 0xac:  /* Border Color 2 */
 761        s->border_b = value;
 762        break;
 763
 764    case 0xb4:  /* Gamma Correction Enable */
 765        s->gamma_config = value & 0x87;
 766        break;
 767    case 0xb6:  /* Gamma Correction Table Index */
 768        s->gamma_idx = value;
 769        break;
 770    case 0xb8:  /* Gamma Correction Table Data */
 771        s->gamma_lut[s->gamma_idx ++] = value;
 772        break;
 773
 774    case 0xba:  /* 3x3 Matrix Enable */
 775        s->matrix_ena = value & 1;
 776        break;
 777    case 0xbc ... 0xde: /* Coefficient Registers */
 778        s->matrix_coeff[(reg - 0xbc) >> 1] = value & ((reg & 2) ? 0x80 : 0xff);
 779        break;
 780    case 0xe0:  /* 3x3 Matrix Red Offset */
 781        s->matrix_r = value;
 782        break;
 783    case 0xe2:  /* 3x3 Matrix Green Offset */
 784        s->matrix_g = value;
 785        break;
 786    case 0xe4:  /* 3x3 Matrix Blue Offset */
 787        s->matrix_b = value;
 788        break;
 789
 790    case 0xe6:  /* Power-save */
 791        s->pm = value & 0x83;
 792        if (value & s->mode & 1)
 793            fprintf(stderr, "%s: The display must be disabled before entering "
 794                            "Standby Mode\n", __FUNCTION__);
 795        break;
 796    case 0xe8:  /* Non-display Period Control / Status */
 797        s->status = value & 0x1b;
 798        break;
 799    case 0xea:  /* RGB Interface Control */
 800        s->rgbgpio_dir = value & 0x8f;
 801        break;
 802    case 0xec:  /* RGB Interface Status */
 803        s->rgbgpio = value & 0xcf;
 804        break;
 805    case 0xee:  /* General-purpose IO Pins Configuration */
 806        s->gpio_dir = value;
 807        break;
 808    case 0xf0:  /* General-purpose IO Pins Status / Control */
 809        s->gpio = value;
 810        break;
 811    case 0xf2:  /* GPIO Positive Edge Interrupt Trigger */
 812        s->gpio_edge[0] = value;
 813        break;
 814    case 0xf4:  /* GPIO Negative Edge Interrupt Trigger */
 815        s->gpio_edge[1] = value;
 816        break;
 817    case 0xf6:  /* GPIO Interrupt Status */
 818        s->gpio_irq &= value;
 819        break;
 820    case 0xf8:  /* GPIO Pull-down Control */
 821        s->gpio_pdown = value;
 822        break;
 823
 824    default:
 825        fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg);
 826        break;
 827    }
 828}
 829
 830uint16_t s1d13745_read(void *opaque, int dc)
 831{
 832    BlizzardState *s = (BlizzardState *) opaque;
 833    uint16_t value = blizzard_reg_read(s, s->reg);
 834
 835    if (s->swallow -- > 0)
 836        return 0;
 837    if (dc)
 838        s->reg ++;
 839
 840    return value;
 841}
 842
 843void s1d13745_write(void *opaque, int dc, uint16_t value)
 844{
 845    BlizzardState *s = (BlizzardState *) opaque;
 846
 847    if (s->swallow -- > 0)
 848        return;
 849    if (dc) {
 850        blizzard_reg_write(s, s->reg, value);
 851
 852        if (s->reg != 0x90 && s->reg != 0x5a && s->reg != 0xb8)
 853            s->reg += 2;
 854    } else
 855        s->reg = value & 0xff;
 856}
 857
 858void s1d13745_write_block(void *opaque, int dc,
 859                void *buf, size_t len, int pitch)
 860{
 861    BlizzardState *s = (BlizzardState *) opaque;
 862
 863    while (len > 0) {
 864        if (s->reg == 0x90 && dc &&
 865                        (s->data.len || blizzard_transfer_setup(s)) &&
 866                        len >= (s->data.len << 1)) {
 867            len -= s->data.len << 1;
 868            s->data.len = 0;
 869            s->data.data = buf;
 870            if (pitch)
 871                s->data.pitch = pitch;
 872            blizzard_window(s);
 873            s->data.data = s->data.buf;
 874            continue;
 875        }
 876
 877        s1d13745_write(opaque, dc, *(uint16_t *) buf);
 878        len -= 2;
 879        buf += 2;
 880    }
 881}
 882
 883static void blizzard_update_display(void *opaque)
 884{
 885    BlizzardState *s = (BlizzardState *) opaque;
 886    int y, bypp, bypl, bwidth;
 887    uint8_t *src, *dst;
 888
 889    if (!s->enable)
 890        return;
 891
 892    if (s->x != ds_get_width(s->state) || s->y != ds_get_height(s->state)) {
 893        s->invalidate = 1;
 894        qemu_console_resize(s->state, s->x, s->y);
 895    }
 896
 897    if (s->invalidate) {
 898        s->invalidate = 0;
 899
 900        if (s->blank) {
 901            bypp = (ds_get_bits_per_pixel(s->state) + 7) >> 3;
 902            memset(ds_get_data(s->state), 0, bypp * s->x * s->y);
 903            return;
 904        }
 905
 906        s->mx[0] = 0;
 907        s->mx[1] = s->x;
 908        s->my[0] = 0;
 909        s->my[1] = s->y;
 910    }
 911
 912    if (s->mx[1] <= s->mx[0])
 913        return;
 914
 915    bypp = (ds_get_bits_per_pixel(s->state) + 7) >> 3;
 916    bypl = bypp * s->x;
 917    bwidth = bypp * (s->mx[1] - s->mx[0]);
 918    y = s->my[0];
 919    src = s->fb + bypl * y + bypp * s->mx[0];
 920    dst = ds_get_data(s->state) + bypl * y + bypp * s->mx[0];
 921    for (; y < s->my[1]; y ++, src += bypl, dst += bypl)
 922        memcpy(dst, src, bwidth);
 923
 924    dpy_gfx_update(s->state, s->mx[0], s->my[0],
 925                   s->mx[1] - s->mx[0], y - s->my[0]);
 926
 927    s->mx[0] = s->x;
 928    s->mx[1] = 0;
 929    s->my[0] = s->y;
 930    s->my[1] = 0;
 931}
 932
 933static void blizzard_screen_dump(void *opaque, const char *filename,
 934                                 bool cswitch, Error **errp)
 935{
 936    BlizzardState *s = (BlizzardState *) opaque;
 937
 938    blizzard_update_display(opaque);
 939    if (s && ds_get_data(s->state))
 940        ppm_save(filename, s->state->surface, errp);
 941}
 942
 943#define DEPTH 8
 944#include "blizzard_template.h"
 945#define DEPTH 15
 946#include "blizzard_template.h"
 947#define DEPTH 16
 948#include "blizzard_template.h"
 949#define DEPTH 24
 950#include "blizzard_template.h"
 951#define DEPTH 32
 952#include "blizzard_template.h"
 953
 954void *s1d13745_init(qemu_irq gpio_int)
 955{
 956    BlizzardState *s = (BlizzardState *) g_malloc0(sizeof(*s));
 957
 958    s->fb = g_malloc(0x180000);
 959
 960    s->state = graphic_console_init(blizzard_update_display,
 961                                 blizzard_invalidate_display,
 962                                 blizzard_screen_dump, NULL, s);
 963
 964    switch (ds_get_bits_per_pixel(s->state)) {
 965    case 0:
 966        s->line_fn_tab[0] = s->line_fn_tab[1] =
 967                g_malloc0(sizeof(blizzard_fn_t) * 0x10);
 968        break;
 969    case 8:
 970        s->line_fn_tab[0] = blizzard_draw_fn_8;
 971        s->line_fn_tab[1] = blizzard_draw_fn_r_8;
 972        break;
 973    case 15:
 974        s->line_fn_tab[0] = blizzard_draw_fn_15;
 975        s->line_fn_tab[1] = blizzard_draw_fn_r_15;
 976        break;
 977    case 16:
 978        s->line_fn_tab[0] = blizzard_draw_fn_16;
 979        s->line_fn_tab[1] = blizzard_draw_fn_r_16;
 980        break;
 981    case 24:
 982        s->line_fn_tab[0] = blizzard_draw_fn_24;
 983        s->line_fn_tab[1] = blizzard_draw_fn_r_24;
 984        break;
 985    case 32:
 986        s->line_fn_tab[0] = blizzard_draw_fn_32;
 987        s->line_fn_tab[1] = blizzard_draw_fn_r_32;
 988        break;
 989    default:
 990        fprintf(stderr, "%s: Bad color depth\n", __FUNCTION__);
 991        exit(1);
 992    }
 993
 994    blizzard_reset(s);
 995
 996    return s;
 997}
 998