1#ifndef QEMU_SH_H
2#define QEMU_SH_H
3
4
5#include "sh_intc.h"
6
7#define A7ADDR(x) ((x) & 0x1fffffff)
8#define P4ADDR(x) ((x) | 0xe0000000)
9
10
11struct SH7750State;
12struct MemoryRegion;
13
14struct SH7750State *sh7750_init(CPUSH4State * cpu, struct MemoryRegion *sysmem);
15
16typedef struct {
17
18 uint16_t portamask_trigger;
19 uint16_t portbmask_trigger;
20
21 int (*port_change_cb) (uint16_t porta, uint16_t portb,
22 uint16_t * periph_pdtra,
23 uint16_t * periph_portdira,
24 uint16_t * periph_pdtrb,
25 uint16_t * periph_portdirb);
26} sh7750_io_device;
27
28int sh7750_register_io_device(struct SH7750State *s,
29 sh7750_io_device * device);
30
31#define TMU012_FEAT_TOCR (1 << 0)
32#define TMU012_FEAT_3CHAN (1 << 1)
33#define TMU012_FEAT_EXTCLK (1 << 2)
34void tmu012_init(struct MemoryRegion *sysmem, hwaddr base,
35 int feat, uint32_t freq,
36 qemu_irq ch0_irq, qemu_irq ch1_irq,
37 qemu_irq ch2_irq0, qemu_irq ch2_irq1);
38
39
40
41#define SH_SERIAL_FEAT_SCIF (1 << 0)
42void sh_serial_init(MemoryRegion *sysmem,
43 hwaddr base, int feat,
44 uint32_t freq, CharDriverState *chr,
45 qemu_irq eri_source,
46 qemu_irq rxi_source,
47 qemu_irq txi_source,
48 qemu_irq tei_source,
49 qemu_irq bri_source);
50
51
52qemu_irq sh7750_irl(struct SH7750State *s);
53
54
55int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
56
57#endif
58