1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27#include "hw.h"
28#include "pc.h"
29#include "pm_smbus.h"
30#include "pci/pci.h"
31#include "sysemu/sysemu.h"
32#include "i2c.h"
33#include "smbus.h"
34
35#include "ich9.h"
36
37#define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
38#define ICH9_SMB_DEVICE(obj) \
39 OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
40
41typedef struct ICH9SMBState {
42 PCIDevice dev;
43
44 PMSMBus smb;
45} ICH9SMBState;
46
47static const VMStateDescription vmstate_ich9_smbus = {
48 .name = "ich9_smb",
49 .version_id = 1,
50 .minimum_version_id = 1,
51 .minimum_version_id_old = 1,
52 .fields = (VMStateField[]) {
53 VMSTATE_PCI_DEVICE(dev, struct ICH9SMBState),
54 VMSTATE_END_OF_LIST()
55 }
56};
57
58static void ich9_smbus_write_config(PCIDevice *d, uint32_t address,
59 uint32_t val, int len)
60{
61 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
62
63 pci_default_write_config(d, address, val, len);
64 if (range_covers_byte(address, len, ICH9_SMB_HOSTC)) {
65 uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
66 if ((hostc & ICH9_SMB_HOSTC_HST_EN) &&
67 !(hostc & ICH9_SMB_HOSTC_I2C_EN)) {
68 memory_region_set_enabled(&s->smb.io, true);
69 } else {
70 memory_region_set_enabled(&s->smb.io, false);
71 }
72 }
73}
74
75static int ich9_smbus_initfn(PCIDevice *d)
76{
77 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
78
79
80 pci_config_set_interrupt_pin(d->config, 0x01);
81
82 pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
83
84
85 pm_smbus_init(&d->qdev, &s->smb);
86 pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
87 &s->smb.io);
88 return 0;
89}
90
91static void ich9_smb_class_init(ObjectClass *klass, void *data)
92{
93 DeviceClass *dc = DEVICE_CLASS(klass);
94 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
95
96 k->vendor_id = PCI_VENDOR_ID_INTEL;
97 k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
98 k->revision = ICH9_A2_SMB_REVISION;
99 k->class_id = PCI_CLASS_SERIAL_SMBUS;
100 dc->no_user = 1;
101 dc->vmsd = &vmstate_ich9_smbus;
102 dc->desc = "ICH9 SMBUS Bridge";
103 k->init = ich9_smbus_initfn;
104 k->config_write = ich9_smbus_write_config;
105}
106
107i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
108{
109 PCIDevice *d =
110 pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
111 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
112 return s->smb.smbus;
113}
114
115static const TypeInfo ich9_smb_info = {
116 .name = TYPE_ICH9_SMB_DEVICE,
117 .parent = TYPE_PCI_DEVICE,
118 .instance_size = sizeof(ICH9SMBState),
119 .class_init = ich9_smb_class_init,
120};
121
122static void ich9_smb_register(void)
123{
124 type_register_static(&ich9_smb_info);
125}
126
127type_init(ich9_smb_register);
128