LXR qemu/hw/ppc4xx.h

   1/*
   2 * QEMU PowerPC 4xx emulation shared definitions
   3 *
   4 * Copyright (c) 2007 Jocelyn Mayer
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#if !defined(PPC_4XX_H)
  26#define PPC_4XX_H
  27
  28#include "pci/pci.h"
  29
  30/* PowerPC 4xx core initialization */
  31PowerPCCPU *ppc4xx_init(const char *cpu_model,
  32                        clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
  33                        uint32_t sysclk);
  34
  35/* PowerPC 4xx universal interrupt controller */
  36enum {
  37    PPCUIC_OUTPUT_INT = 0,
  38    PPCUIC_OUTPUT_CINT = 1,
  39    PPCUIC_OUTPUT_NB,
  40};
  41qemu_irq *ppcuic_init (CPUPPCState *env, qemu_irq *irqs,
  42                       uint32_t dcr_base, int has_ssr, int has_vr);
  43
  44ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks,
  45                               MemoryRegion ram_memories[],
  46                               hwaddr ram_bases[],
  47                               hwaddr ram_sizes[],
  48                               const unsigned int sdram_bank_sizes[]);
  49
  50void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks,
  51                        MemoryRegion ram_memories[],
  52                        hwaddr *ram_bases,
  53                        hwaddr *ram_sizes,
  54                        int do_init);
  55
  56#define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
  57
  58PCIBus *ppc4xx_pci_init(CPUPPCState *env, qemu_irq pci_irqs[4],
  59                        hwaddr config_space,
  60                        hwaddr int_ack,
  61                        hwaddr special_cycle,
  62                        hwaddr registers);
  63
  64#endif /* !defined(PPC_4XX_H) */
  65