LXR qemu/hw/pl050.c

   1/*
   2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
   3 *
   4 * Copyright (c) 2006-2007 CodeSourcery.
   5 * Written by Paul Brook
   6 *
   7 * This code is licensed under the GPL.
   8 */
   9
  10#include "sysbus.h"
  11#include "ps2.h"
  12
  13typedef struct {
  14    SysBusDevice busdev;
  15    MemoryRegion iomem;
  16    void *dev;
  17    uint32_t cr;
  18    uint32_t clk;
  19    uint32_t last;
  20    int pending;
  21    qemu_irq irq;
  22    int is_mouse;
  23} pl050_state;
  24
  25static const VMStateDescription vmstate_pl050 = {
  26    .name = "pl050",
  27    .version_id = 1,
  28    .minimum_version_id = 1,
  29    .fields = (VMStateField[]) {
  30        VMSTATE_UINT32(cr, pl050_state),
  31        VMSTATE_UINT32(clk, pl050_state),
  32        VMSTATE_UINT32(last, pl050_state),
  33        VMSTATE_INT32(pending, pl050_state),
  34        VMSTATE_INT32(is_mouse, pl050_state),
  35        VMSTATE_END_OF_LIST()
  36    }
  37};
  38
  39#define PL050_TXEMPTY         (1 << 6)
  40#define PL050_TXBUSY          (1 << 5)
  41#define PL050_RXFULL          (1 << 4)
  42#define PL050_RXBUSY          (1 << 3)
  43#define PL050_RXPARITY        (1 << 2)
  44#define PL050_KMIC            (1 << 1)
  45#define PL050_KMID            (1 << 0)
  46
  47static const unsigned char pl050_id[] =
  48{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  49
  50static void pl050_update(void *opaque, int level)
  51{
  52    pl050_state *s = (pl050_state *)opaque;
  53    int raise;
  54
  55    s->pending = level;
  56    raise = (s->pending && (s->cr & 0x10) != 0)
  57            || (s->cr & 0x08) != 0;
  58    qemu_set_irq(s->irq, raise);
  59}
  60
  61static uint64_t pl050_read(void *opaque, hwaddr offset,
  62                           unsigned size)
  63{
  64    pl050_state *s = (pl050_state *)opaque;
  65    if (offset >= 0xfe0 && offset < 0x1000)
  66        return pl050_id[(offset - 0xfe0) >> 2];
  67
  68    switch (offset >> 2) {
  69    case 0: /* KMICR */
  70        return s->cr;
  71    case 1: /* KMISTAT */
  72        {
  73            uint8_t val;
  74            uint32_t stat;
  75
  76            val = s->last;
  77            val = val ^ (val >> 4);
  78            val = val ^ (val >> 2);
  79            val = (val ^ (val >> 1)) & 1;
  80
  81            stat = PL050_TXEMPTY;
  82            if (val)
  83                stat |= PL050_RXPARITY;
  84            if (s->pending)
  85                stat |= PL050_RXFULL;
  86
  87            return stat;
  88        }
  89    case 2: /* KMIDATA */
  90        if (s->pending)
  91            s->last = ps2_read_data(s->dev);
  92        return s->last;
  93    case 3: /* KMICLKDIV */
  94        return s->clk;
  95    case 4: /* KMIIR */
  96        return s->pending | 2;
  97    default:
  98        qemu_log_mask(LOG_GUEST_ERROR,
  99                      "pl050_read: Bad offset %x\n", (int)offset);
 100        return 0;
 101    }
 102}
 103
 104static void pl050_write(void *opaque, hwaddr offset,
 105                        uint64_t value, unsigned size)
 106{
 107    pl050_state *s = (pl050_state *)opaque;
 108    switch (offset >> 2) {
 109    case 0: /* KMICR */
 110        s->cr = value;
 111        pl050_update(s, s->pending);
 112        /* ??? Need to implement the enable/disable bit.  */
 113        break;
 114    case 2: /* KMIDATA */
 115        /* ??? This should toggle the TX interrupt line.  */
 116        /* ??? This means kbd/mouse can block each other.  */
 117        if (s->is_mouse) {
 118            ps2_write_mouse(s->dev, value);
 119        } else {
 120            ps2_write_keyboard(s->dev, value);
 121        }
 122        break;
 123    case 3: /* KMICLKDIV */
 124        s->clk = value;
 125        return;
 126    default:
 127        qemu_log_mask(LOG_GUEST_ERROR,
 128                      "pl050_write: Bad offset %x\n", (int)offset);
 129    }
 130}
 131static const MemoryRegionOps pl050_ops = {
 132    .read = pl050_read,
 133    .write = pl050_write,
 134    .endianness = DEVICE_NATIVE_ENDIAN,
 135};
 136
 137static int pl050_init(SysBusDevice *dev, int is_mouse)
 138{
 139    pl050_state *s = FROM_SYSBUS(pl050_state, dev);
 140
 141    memory_region_init_io(&s->iomem, &pl050_ops, s, "pl050", 0x1000);
 142    sysbus_init_mmio(dev, &s->iomem);
 143    sysbus_init_irq(dev, &s->irq);
 144    s->is_mouse = is_mouse;
 145    if (s->is_mouse)
 146        s->dev = ps2_mouse_init(pl050_update, s);
 147    else
 148        s->dev = ps2_kbd_init(pl050_update, s);
 149    return 0;
 150}
 151
 152static int pl050_init_keyboard(SysBusDevice *dev)
 153{
 154    return pl050_init(dev, 0);
 155}
 156
 157static int pl050_init_mouse(SysBusDevice *dev)
 158{
 159    return pl050_init(dev, 1);
 160}
 161
 162static void pl050_kbd_class_init(ObjectClass *klass, void *data)
 163{
 164    DeviceClass *dc = DEVICE_CLASS(klass);
 165    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 166
 167    k->init = pl050_init_keyboard;
 168    dc->vmsd = &vmstate_pl050;
 169}
 170
 171static const TypeInfo pl050_kbd_info = {
 172    .name          = "pl050_keyboard",
 173    .parent        = TYPE_SYS_BUS_DEVICE,
 174    .instance_size = sizeof(pl050_state),
 175    .class_init    = pl050_kbd_class_init,
 176};
 177
 178static void pl050_mouse_class_init(ObjectClass *klass, void *data)
 179{
 180    DeviceClass *dc = DEVICE_CLASS(klass);
 181    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 182
 183    k->init = pl050_init_mouse;
 184    dc->vmsd = &vmstate_pl050;
 185}
 186
 187static const TypeInfo pl050_mouse_info = {
 188    .name          = "pl050_mouse",
 189    .parent        = TYPE_SYS_BUS_DEVICE,
 190    .instance_size = sizeof(pl050_state),
 191    .class_init    = pl050_mouse_class_init,
 192};
 193
 194static void pl050_register_types(void)
 195{
 196    type_register_static(&pl050_kbd_info);
 197    type_register_static(&pl050_mouse_info);
 198}
 199
 200type_init(pl050_register_types)
 201