LXR qemu/hw/xilinx.h

   1#ifndef HW_XILINX_H
   2#define HW_XILINX_H 1
   3
   4
   5#include "stream.h"
   6#include "qemu-common.h"
   7#include "net/net.h"
   8
   9static inline DeviceState *
  10xilinx_intc_create(hwaddr base, qemu_irq irq, int kind_of_intr)
  11{
  12    DeviceState *dev;
  13
  14    dev = qdev_create(NULL, "xlnx.xps-intc");
  15    qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
  16    qdev_init_nofail(dev);
  17    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  18    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  19    return dev;
  20}
  21
  22/* OPB Timer/Counter.  */
  23static inline DeviceState *
  24xilinx_timer_create(hwaddr base, qemu_irq irq, int oto, int freq)
  25{
  26    DeviceState *dev;
  27
  28    dev = qdev_create(NULL, "xlnx.xps-timer");
  29    qdev_prop_set_uint32(dev, "one-timer-only", oto);
  30    qdev_prop_set_uint32(dev, "clock-frequency", freq);
  31    qdev_init_nofail(dev);
  32    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  33    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  34    return dev;
  35}
  36
  37/* XPS Ethernet Lite MAC.  */
  38static inline DeviceState *
  39xilinx_ethlite_create(NICInfo *nd, hwaddr base, qemu_irq irq,
  40                      int txpingpong, int rxpingpong)
  41{
  42    DeviceState *dev;
  43
  44    qemu_check_nic_model(nd, "xlnx.xps-ethernetlite");
  45
  46    dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
  47    qdev_set_nic_properties(dev, nd);
  48    qdev_prop_set_uint32(dev, "tx-ping-pong", txpingpong);
  49    qdev_prop_set_uint32(dev, "rx-ping-pong", rxpingpong);
  50    qdev_init_nofail(dev);
  51    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  52    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  53    return dev;
  54}
  55
  56static inline void
  57xilinx_axiethernet_init(DeviceState *dev, NICInfo *nd, StreamSlave *peer,
  58                        hwaddr base, qemu_irq irq, int txmem, int rxmem)
  59{
  60    Error *errp = NULL;
  61
  62    qdev_set_nic_properties(dev, nd);
  63    qdev_prop_set_uint32(dev, "rxmem", rxmem);
  64    qdev_prop_set_uint32(dev, "txmem", txmem);
  65    object_property_set_link(OBJECT(dev), OBJECT(peer), "axistream-connected",
  66                             &errp);
  67    assert_no_error(errp);
  68    qdev_init_nofail(dev);
  69    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  70    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  71}
  72
  73static inline void
  74xilinx_axidma_init(DeviceState *dev, StreamSlave *peer, hwaddr base,
  75                   qemu_irq irq, qemu_irq irq2, int freqhz)
  76{
  77    Error *errp = NULL;
  78
  79    qdev_prop_set_uint32(dev, "freqhz", freqhz);
  80    object_property_set_link(OBJECT(dev), OBJECT(peer), "axistream-connected",
  81                             &errp);
  82    assert_no_error(errp);
  83    qdev_init_nofail(dev);
  84
  85    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  86    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  87    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, irq2);
  88}
  89
  90#endif
  91