qemu/hw/ppc/mac_newworld.c
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   1/*
   2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3 *
   4 * Copyright (c) 2004-2007 Fabrice Bellard
   5 * Copyright (c) 2007 Jocelyn Mayer
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 *
  25 * PCI bus layout on a real G5 (U3 based):
  26 *
  27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47 *
  48 */
  49#include "hw/hw.h"
  50#include "hw/ppc/ppc.h"
  51#include "hw/ppc/mac.h"
  52#include "hw/input/adb.h"
  53#include "hw/ppc/mac_dbdma.h"
  54#include "hw/timer/m48t59.h"
  55#include "hw/pci/pci.h"
  56#include "net/net.h"
  57#include "sysemu/sysemu.h"
  58#include "hw/boards.h"
  59#include "hw/nvram/fw_cfg.h"
  60#include "hw/char/escc.h"
  61#include "hw/ppc/openpic.h"
  62#include "hw/ide.h"
  63#include "hw/loader.h"
  64#include "elf.h"
  65#include "sysemu/kvm.h"
  66#include "kvm_ppc.h"
  67#include "hw/usb.h"
  68#include "sysemu/blockdev.h"
  69#include "exec/address-spaces.h"
  70#include "hw/sysbus.h"
  71
  72#define MAX_IDE_BUS 2
  73#define CFG_ADDR 0xf0000510
  74
  75/* debug UniNorth */
  76//#define DEBUG_UNIN
  77
  78#ifdef DEBUG_UNIN
  79#define UNIN_DPRINTF(fmt, ...)                                  \
  80    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
  81#else
  82#define UNIN_DPRINTF(fmt, ...)
  83#endif
  84
  85/* UniN device */
  86static void unin_write(void *opaque, hwaddr addr, uint64_t value,
  87                       unsigned size)
  88{
  89    UNIN_DPRINTF("write addr " TARGET_FMT_plx " val %"PRIx64"\n", addr, value);
  90}
  91
  92static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size)
  93{
  94    uint32_t value;
  95
  96    value = 0;
  97    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  98
  99    return value;
 100}
 101
 102static const MemoryRegionOps unin_ops = {
 103    .read = unin_read,
 104    .write = unin_write,
 105    .endianness = DEVICE_NATIVE_ENDIAN,
 106};
 107
 108static int fw_cfg_boot_set(void *opaque, const char *boot_device)
 109{
 110    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
 111    return 0;
 112}
 113
 114static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 115{
 116    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 117}
 118
 119static hwaddr round_page(hwaddr addr)
 120{
 121    return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
 122}
 123
 124static void ppc_core99_reset(void *opaque)
 125{
 126    PowerPCCPU *cpu = opaque;
 127
 128    cpu_reset(CPU(cpu));
 129    /* 970 CPUs want to get their initial IP as part of their boot protocol */
 130    cpu->env.nip = PROM_ADDR + 0x100;
 131}
 132
 133/* PowerPC Mac99 hardware initialisation */
 134static void ppc_core99_init(QEMUMachineInitArgs *args)
 135{
 136    ram_addr_t ram_size = args->ram_size;
 137    const char *cpu_model = args->cpu_model;
 138    const char *kernel_filename = args->kernel_filename;
 139    const char *kernel_cmdline = args->kernel_cmdline;
 140    const char *initrd_filename = args->initrd_filename;
 141    const char *boot_device = args->boot_device;
 142    PowerPCCPU *cpu = NULL;
 143    CPUPPCState *env = NULL;
 144    char *filename;
 145    qemu_irq *pic, **openpic_irqs;
 146    MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
 147    int linux_boot, i, j, k;
 148    MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
 149    hwaddr kernel_base, initrd_base, cmdline_base = 0;
 150    long kernel_size, initrd_size;
 151    PCIBus *pci_bus;
 152    PCIDevice *macio;
 153    MACIOIDEState *macio_ide;
 154    BusState *adb_bus;
 155    MacIONVRAMState *nvr;
 156    int bios_size;
 157    MemoryRegion *pic_mem, *escc_mem;
 158    MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
 159    int ppc_boot_device;
 160    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 161    void *fw_cfg;
 162    int machine_arch;
 163    SysBusDevice *s;
 164    DeviceState *dev;
 165
 166    linux_boot = (kernel_filename != NULL);
 167
 168    /* init CPUs */
 169    if (cpu_model == NULL)
 170#ifdef TARGET_PPC64
 171        cpu_model = "970fx";
 172#else
 173        cpu_model = "G4";
 174#endif
 175    for (i = 0; i < smp_cpus; i++) {
 176        cpu = cpu_ppc_init(cpu_model);
 177        if (cpu == NULL) {
 178            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 179            exit(1);
 180        }
 181        env = &cpu->env;
 182
 183        /* Set time-base frequency to 100 Mhz */
 184        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 185        qemu_register_reset(ppc_core99_reset, cpu);
 186    }
 187
 188    /* allocate RAM */
 189    memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
 190    vmstate_register_ram_global(ram);
 191    memory_region_add_subregion(get_system_memory(), 0, ram);
 192
 193    /* allocate and load BIOS */
 194    memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
 195    vmstate_register_ram_global(bios);
 196    if (bios_name == NULL)
 197        bios_name = PROM_FILENAME;
 198    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 199    memory_region_set_readonly(bios, true);
 200    memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
 201
 202    /* Load OpenBIOS (ELF) */
 203    if (filename) {
 204        bios_size = load_elf(filename, NULL, NULL, NULL,
 205                             NULL, NULL, 1, ELF_MACHINE, 0);
 206
 207        g_free(filename);
 208    } else {
 209        bios_size = -1;
 210    }
 211    if (bios_size < 0 || bios_size > BIOS_SIZE) {
 212        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 213        exit(1);
 214    }
 215
 216    if (linux_boot) {
 217        uint64_t lowaddr = 0;
 218        int bswap_needed;
 219
 220#ifdef BSWAP_NEEDED
 221        bswap_needed = 1;
 222#else
 223        bswap_needed = 0;
 224#endif
 225        kernel_base = KERNEL_LOAD_ADDR;
 226
 227        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 228                               NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 229        if (kernel_size < 0)
 230            kernel_size = load_aout(kernel_filename, kernel_base,
 231                                    ram_size - kernel_base, bswap_needed,
 232                                    TARGET_PAGE_SIZE);
 233        if (kernel_size < 0)
 234            kernel_size = load_image_targphys(kernel_filename,
 235                                              kernel_base,
 236                                              ram_size - kernel_base);
 237        if (kernel_size < 0) {
 238            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
 239            exit(1);
 240        }
 241        /* load initrd */
 242        if (initrd_filename) {
 243            initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 244            initrd_size = load_image_targphys(initrd_filename, initrd_base,
 245                                              ram_size - initrd_base);
 246            if (initrd_size < 0) {
 247                hw_error("qemu: could not load initial ram disk '%s'\n",
 248                         initrd_filename);
 249                exit(1);
 250            }
 251            cmdline_base = round_page(initrd_base + initrd_size);
 252        } else {
 253            initrd_base = 0;
 254            initrd_size = 0;
 255            cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 256        }
 257        ppc_boot_device = 'm';
 258    } else {
 259        kernel_base = 0;
 260        kernel_size = 0;
 261        initrd_base = 0;
 262        initrd_size = 0;
 263        ppc_boot_device = '\0';
 264        /* We consider that NewWorld PowerMac never have any floppy drive
 265         * For now, OHW cannot boot from the network.
 266         */
 267        for (i = 0; boot_device[i] != '\0'; i++) {
 268            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 269                ppc_boot_device = boot_device[i];
 270                break;
 271            }
 272        }
 273        if (ppc_boot_device == '\0') {
 274            fprintf(stderr, "No valid boot device for Mac99 machine\n");
 275            exit(1);
 276        }
 277    }
 278
 279    /* Register 8 MB of ISA IO space */
 280    isa_mmio_init(0xf2000000, 0x00800000);
 281
 282    /* UniN init */
 283    memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
 284    memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
 285
 286    openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 287    openpic_irqs[0] =
 288        g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 289    for (i = 0; i < smp_cpus; i++) {
 290        /* Mac99 IRQ connection between OpenPIC outputs pins
 291         * and PowerPC input pins
 292         */
 293        switch (PPC_INPUT(env)) {
 294        case PPC_FLAGS_INPUT_6xx:
 295            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 296            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 297                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 298            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 299                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 300            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 301                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 302            /* Not connected ? */
 303            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 304            /* Check this */
 305            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 306                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 307            break;
 308#if defined(TARGET_PPC64)
 309        case PPC_FLAGS_INPUT_970:
 310            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 311            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 312                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 313            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 314                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 315            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 316                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 317            /* Not connected ? */
 318            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 319            /* Check this */
 320            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 321                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 322            break;
 323#endif /* defined(TARGET_PPC64) */
 324        default:
 325            hw_error("Bus model not supported on mac99 machine\n");
 326            exit(1);
 327        }
 328    }
 329
 330    pic = g_new(qemu_irq, 64);
 331
 332    dev = qdev_create(NULL, "openpic");
 333    qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_RAVEN);
 334    qdev_init_nofail(dev);
 335    s = SYS_BUS_DEVICE(dev);
 336    pic_mem = s->mmio[0].memory;
 337    k = 0;
 338    for (i = 0; i < smp_cpus; i++) {
 339        for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
 340            sysbus_connect_irq(s, k++, openpic_irqs[i][j]);
 341        }
 342    }
 343
 344    for (i = 0; i < 64; i++) {
 345        pic[i] = qdev_get_gpio_in(dev, i);
 346    }
 347
 348    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 349        /* 970 gets a U3 bus */
 350        pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
 351        machine_arch = ARCH_MAC99_U3;
 352    } else {
 353        pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
 354        machine_arch = ARCH_MAC99;
 355    }
 356    /* init basic PC hardware */
 357    pci_vga_init(pci_bus);
 358
 359    escc_mem = escc_init(0, pic[0x25], pic[0x24],
 360                         serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 361    memory_region_init_alias(escc_bar, "escc-bar",
 362                             escc_mem, 0, memory_region_size(escc_mem));
 363
 364    for(i = 0; i < nb_nics; i++)
 365        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
 366
 367    ide_drive_get(hd, MAX_IDE_BUS);
 368
 369    macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO);
 370    dev = DEVICE(macio);
 371    qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */
 372    qdev_connect_gpio_out(dev, 1, pic[0x0d]); /* IDE */
 373    qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE DMA */
 374    qdev_connect_gpio_out(dev, 3, pic[0x0e]); /* IDE */
 375    qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE DMA */
 376    macio_init(macio, pic_mem, escc_bar);
 377
 378    /* We only emulate 2 out of 3 IDE controllers for now */
 379    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 380                                                        "ide[0]"));
 381    macio_ide_init_drives(macio_ide, hd);
 382
 383    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 384                                                        "ide[1]"));
 385    macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 386
 387    dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 388    adb_bus = qdev_get_child_bus(dev, "adb.0");
 389    dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 390    qdev_init_nofail(dev);
 391    dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 392    qdev_init_nofail(dev);
 393
 394    if (usb_enabled(machine_arch == ARCH_MAC99_U3)) {
 395        pci_create_simple(pci_bus, -1, "pci-ohci");
 396        /* U3 needs to use USB for input because Linux doesn't support via-cuda
 397        on PPC64 */
 398        if (machine_arch == ARCH_MAC99_U3) {
 399            usbdevice_create("keyboard");
 400            usbdevice_create("mouse");
 401        }
 402    }
 403
 404    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 405        graphic_depth = 15;
 406
 407    /* The NewWorld NVRAM is not located in the MacIO device */
 408    dev = qdev_create(NULL, TYPE_MACIO_NVRAM);
 409    qdev_prop_set_uint32(dev, "size", 0x2000);
 410    qdev_prop_set_uint32(dev, "it_shift", 1);
 411    qdev_init_nofail(dev);
 412    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xFFF04000);
 413    nvr = MACIO_NVRAM(dev);
 414    pmac_format_nvram_partition(nvr, 0x2000);
 415    /* No PCI init: the BIOS will do it */
 416
 417    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 418    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
 419    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 420    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 421    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 422    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 423    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 424    if (kernel_cmdline) {
 425        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 426        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 427    } else {
 428        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 429    }
 430    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 431    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 432    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 433
 434    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 435    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 436    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 437
 438    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 439    if (kvm_enabled()) {
 440#ifdef CONFIG_KVM
 441        uint8_t *hypercall;
 442
 443        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
 444        hypercall = g_malloc(16);
 445        kvmppc_get_hypercall(env, hypercall, 16);
 446        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 447        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 448#endif
 449    } else {
 450        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
 451    }
 452
 453    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 454}
 455
 456static QEMUMachine core99_machine = {
 457    .name = "mac99",
 458    .desc = "Mac99 based PowerMAC",
 459    .init = ppc_core99_init,
 460    .max_cpus = MAX_CPUS,
 461#ifdef TARGET_PPC64
 462    .is_default = 1,
 463#endif
 464    DEFAULT_MACHINE_OPTIONS,
 465};
 466
 467static void core99_machine_init(void)
 468{
 469    qemu_register_machine(&core99_machine);
 470}
 471
 472machine_init(core99_machine_init);
 473