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24#ifndef HW_VGA_INT_H
25#define HW_VGA_INT_H 1
26
27#include <hw/hw.h>
28#include "qapi/error.h"
29#include "exec/memory.h"
30
31#define ST01_V_RETRACE 0x08
32#define ST01_DISP_ENABLE 0x01
33
34#define VBE_DISPI_MAX_XRES 16000
35#define VBE_DISPI_MAX_YRES 12000
36#define VBE_DISPI_MAX_BPP 32
37
38#define VBE_DISPI_INDEX_ID 0x0
39#define VBE_DISPI_INDEX_XRES 0x1
40#define VBE_DISPI_INDEX_YRES 0x2
41#define VBE_DISPI_INDEX_BPP 0x3
42#define VBE_DISPI_INDEX_ENABLE 0x4
43#define VBE_DISPI_INDEX_BANK 0x5
44#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
45#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
46#define VBE_DISPI_INDEX_X_OFFSET 0x8
47#define VBE_DISPI_INDEX_Y_OFFSET 0x9
48#define VBE_DISPI_INDEX_NB 0xa
49#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
50
51#define VBE_DISPI_ID0 0xB0C0
52#define VBE_DISPI_ID1 0xB0C1
53#define VBE_DISPI_ID2 0xB0C2
54#define VBE_DISPI_ID3 0xB0C3
55#define VBE_DISPI_ID4 0xB0C4
56#define VBE_DISPI_ID5 0xB0C5
57
58#define VBE_DISPI_DISABLED 0x00
59#define VBE_DISPI_ENABLED 0x01
60#define VBE_DISPI_GETCAPS 0x02
61#define VBE_DISPI_8BIT_DAC 0x20
62#define VBE_DISPI_LFB_ENABLED 0x40
63#define VBE_DISPI_NOCLEARMEM 0x80
64
65#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
66
67#define CH_ATTR_SIZE (160 * 100)
68#define VGA_MAX_HEIGHT 2048
69
70struct vga_precise_retrace {
71 int64_t ticks_per_char;
72 int64_t total_chars;
73 int htotal;
74 int hstart;
75 int hend;
76 int vstart;
77 int vend;
78 int freq;
79};
80
81union vga_retrace {
82 struct vga_precise_retrace precise;
83};
84
85struct VGACommonState;
86typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
87typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
88
89typedef struct VGACommonState {
90 MemoryRegion *legacy_address_space;
91 uint8_t *vram_ptr;
92 MemoryRegion vram;
93 MemoryRegion vram_vbe;
94 uint32_t vram_size;
95 uint32_t vram_size_mb;
96 uint32_t latch;
97 MemoryRegion *chain4_alias;
98 uint8_t sr_index;
99 uint8_t sr[256];
100 uint8_t gr_index;
101 uint8_t gr[256];
102 uint8_t ar_index;
103 uint8_t ar[21];
104 int ar_flip_flop;
105 uint8_t cr_index;
106 uint8_t cr[256];
107 uint8_t msr;
108 uint8_t fcr;
109 uint8_t st00;
110 uint8_t st01;
111 uint8_t dac_state;
112 uint8_t dac_sub_index;
113 uint8_t dac_read_index;
114 uint8_t dac_write_index;
115 uint8_t dac_cache[3];
116 int dac_8bit;
117 uint8_t palette[768];
118 int32_t bank_offset;
119 int (*get_bpp)(struct VGACommonState *s);
120 void (*get_offsets)(struct VGACommonState *s,
121 uint32_t *pline_offset,
122 uint32_t *pstart_addr,
123 uint32_t *pline_compare);
124 void (*get_resolution)(struct VGACommonState *s,
125 int *pwidth,
126 int *pheight);
127
128 uint16_t vbe_index;
129 uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
130 uint32_t vbe_start_addr;
131 uint32_t vbe_line_offset;
132 uint32_t vbe_bank_mask;
133 int vbe_mapped;
134
135 QemuConsole *con;
136 uint32_t font_offsets[2];
137 int graphic_mode;
138 uint8_t shift_control;
139 uint8_t double_scan;
140 uint32_t line_offset;
141 uint32_t line_compare;
142 uint32_t start_addr;
143 uint32_t plane_updated;
144 uint32_t last_line_offset;
145 uint8_t last_cw, last_ch;
146 uint32_t last_width, last_height;
147 uint32_t last_scr_width, last_scr_height;
148 uint32_t last_depth;
149 uint8_t cursor_start, cursor_end;
150 bool cursor_visible_phase;
151 int64_t cursor_blink_time;
152 uint32_t cursor_offset;
153 unsigned int (*rgb_to_pixel)(unsigned int r,
154 unsigned int g, unsigned b);
155 const GraphicHwOps *hw_ops;
156 bool full_update_text;
157 bool full_update_gfx;
158
159 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
160 void (*cursor_invalidate)(struct VGACommonState *s);
161 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
162
163 uint32_t last_palette[256];
164 uint32_t last_ch_attr[CH_ATTR_SIZE];
165
166 vga_retrace_fn retrace;
167 vga_update_retrace_info_fn update_retrace_info;
168 union vga_retrace retrace_info;
169 uint8_t is_vbe_vmstate;
170} VGACommonState;
171
172static inline int c6_to_8(int v)
173{
174 int b;
175 v &= 0x3f;
176 b = v & 1;
177 return (v << 2) | (b << 1) | b;
178}
179
180void vga_common_init(VGACommonState *s, Object *obj);
181void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
182 MemoryRegion *address_space_io, bool init_vga_ports);
183MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
184 const MemoryRegionPortio **vga_ports,
185 const MemoryRegionPortio **vbe_ports);
186void vga_common_reset(VGACommonState *s);
187
188void vga_sync_dirty_bitmap(VGACommonState *s);
189void vga_dirty_log_start(VGACommonState *s);
190void vga_dirty_log_stop(VGACommonState *s);
191
192extern const VMStateDescription vmstate_vga_common;
193uint32_t vga_ioport_read(void *opaque, uint32_t addr);
194void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
195uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr);
196void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val);
197void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
198
199int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
200
201void vga_init_vbe(VGACommonState *s, Object *obj, MemoryRegion *address_space);
202uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
203void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
204void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
205
206extern const uint8_t sr_mask[8];
207extern const uint8_t gr_mask[16];
208
209#define VGABIOS_FILENAME "vgabios.bin"
210#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
211
212extern const MemoryRegionOps vga_mem_ops;
213
214#endif
215