1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24#include "cpu.h"
25#include "qemu-common.h"
26#include "mmu.h"
27
28
29static void cris_cpu_set_pc(CPUState *cs, vaddr value)
30{
31 CRISCPU *cpu = CRIS_CPU(cs);
32
33 cpu->env.pc = value;
34}
35
36
37static void cris_cpu_reset(CPUState *s)
38{
39 CRISCPU *cpu = CRIS_CPU(s);
40 CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(cpu);
41 CPUCRISState *env = &cpu->env;
42 uint32_t vr;
43
44 ccc->parent_reset(s);
45
46 vr = env->pregs[PR_VR];
47 memset(env, 0, offsetof(CPUCRISState, breakpoints));
48 env->pregs[PR_VR] = vr;
49 tlb_flush(env, 1);
50
51#if defined(CONFIG_USER_ONLY)
52
53 env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
54#else
55 cris_mmu_init(env);
56 env->pregs[PR_CCS] = 0;
57#endif
58}
59
60static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
61{
62 ObjectClass *oc;
63 char *typename;
64
65 if (cpu_model == NULL) {
66 return NULL;
67 }
68
69 typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model);
70 oc = object_class_by_name(typename);
71 g_free(typename);
72 if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) ||
73 object_class_is_abstract(oc))) {
74 oc = NULL;
75 }
76 return oc;
77}
78
79CRISCPU *cpu_cris_init(const char *cpu_model)
80{
81 CRISCPU *cpu;
82 ObjectClass *oc;
83
84 oc = cris_cpu_class_by_name(cpu_model);
85 if (oc == NULL) {
86 return NULL;
87 }
88 cpu = CRIS_CPU(object_new(object_class_get_name(oc)));
89
90 object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
91
92 return cpu;
93}
94
95
96static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
97{
98 CRISCPUClass *ccc_a = CRIS_CPU_CLASS(a);
99 CRISCPUClass *ccc_b = CRIS_CPU_CLASS(b);
100
101
102 if (ccc_a->vr > ccc_b->vr) {
103 return 1;
104 } else if (ccc_a->vr < ccc_b->vr) {
105 return -1;
106 } else {
107 return 0;
108 }
109}
110
111static void cris_cpu_list_entry(gpointer data, gpointer user_data)
112{
113 ObjectClass *oc = data;
114 CPUListState *s = user_data;
115 const char *typename = object_class_get_name(oc);
116 char *name;
117
118 name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU));
119 (*s->cpu_fprintf)(s->file, " %s\n", name);
120 g_free(name);
121}
122
123void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
124{
125 CPUListState s = {
126 .file = f,
127 .cpu_fprintf = cpu_fprintf,
128 };
129 GSList *list;
130
131 list = object_class_get_list(TYPE_CRIS_CPU, false);
132 list = g_slist_sort(list, cris_cpu_list_compare);
133 (*cpu_fprintf)(f, "Available CPUs:\n");
134 g_slist_foreach(list, cris_cpu_list_entry, &s);
135 g_slist_free(list);
136}
137
138static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
139{
140 CPUState *cs = CPU(dev);
141 CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev);
142
143 cpu_reset(cs);
144 qemu_init_vcpu(cs);
145
146 ccc->parent_realize(dev, errp);
147}
148
149static void cris_cpu_initfn(Object *obj)
150{
151 CPUState *cs = CPU(obj);
152 CRISCPU *cpu = CRIS_CPU(obj);
153 CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj);
154 CPUCRISState *env = &cpu->env;
155 static bool tcg_initialized;
156
157 cs->env_ptr = env;
158 cpu_exec_init(env);
159
160 env->pregs[PR_VR] = ccc->vr;
161
162 if (tcg_enabled() && !tcg_initialized) {
163 tcg_initialized = true;
164 if (env->pregs[PR_VR] < 32) {
165 cris_initialize_crisv10_tcg();
166 } else {
167 cris_initialize_tcg();
168 }
169 }
170}
171
172static void crisv8_cpu_class_init(ObjectClass *oc, void *data)
173{
174 CPUClass *cc = CPU_CLASS(oc);
175 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
176
177 ccc->vr = 8;
178 cc->do_interrupt = crisv10_cpu_do_interrupt;
179 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
180}
181
182static void crisv9_cpu_class_init(ObjectClass *oc, void *data)
183{
184 CPUClass *cc = CPU_CLASS(oc);
185 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
186
187 ccc->vr = 9;
188 cc->do_interrupt = crisv10_cpu_do_interrupt;
189 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
190}
191
192static void crisv10_cpu_class_init(ObjectClass *oc, void *data)
193{
194 CPUClass *cc = CPU_CLASS(oc);
195 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
196
197 ccc->vr = 10;
198 cc->do_interrupt = crisv10_cpu_do_interrupt;
199 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
200}
201
202static void crisv11_cpu_class_init(ObjectClass *oc, void *data)
203{
204 CPUClass *cc = CPU_CLASS(oc);
205 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
206
207 ccc->vr = 11;
208 cc->do_interrupt = crisv10_cpu_do_interrupt;
209 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
210}
211
212static void crisv32_cpu_class_init(ObjectClass *oc, void *data)
213{
214 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
215
216 ccc->vr = 32;
217}
218
219#define TYPE(model) model "-" TYPE_CRIS_CPU
220
221static const TypeInfo cris_cpu_model_type_infos[] = {
222 {
223 .name = TYPE("crisv8"),
224 .parent = TYPE_CRIS_CPU,
225 .class_init = crisv8_cpu_class_init,
226 }, {
227 .name = TYPE("crisv9"),
228 .parent = TYPE_CRIS_CPU,
229 .class_init = crisv9_cpu_class_init,
230 }, {
231 .name = TYPE("crisv10"),
232 .parent = TYPE_CRIS_CPU,
233 .class_init = crisv10_cpu_class_init,
234 }, {
235 .name = TYPE("crisv11"),
236 .parent = TYPE_CRIS_CPU,
237 .class_init = crisv11_cpu_class_init,
238 }, {
239 .name = TYPE("crisv32"),
240 .parent = TYPE_CRIS_CPU,
241 .class_init = crisv32_cpu_class_init,
242 }
243};
244
245#undef TYPE
246
247static void cris_cpu_class_init(ObjectClass *oc, void *data)
248{
249 DeviceClass *dc = DEVICE_CLASS(oc);
250 CPUClass *cc = CPU_CLASS(oc);
251 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
252
253 ccc->parent_realize = dc->realize;
254 dc->realize = cris_cpu_realizefn;
255
256 ccc->parent_reset = cc->reset;
257 cc->reset = cris_cpu_reset;
258
259 cc->class_by_name = cris_cpu_class_by_name;
260 cc->do_interrupt = cris_cpu_do_interrupt;
261 cc->dump_state = cris_cpu_dump_state;
262 cc->set_pc = cris_cpu_set_pc;
263 cc->gdb_read_register = cris_cpu_gdb_read_register;
264 cc->gdb_write_register = cris_cpu_gdb_write_register;
265#ifndef CONFIG_USER_ONLY
266 cc->get_phys_page_debug = cris_cpu_get_phys_page_debug;
267#endif
268
269 cc->gdb_num_core_regs = 49;
270}
271
272static const TypeInfo cris_cpu_type_info = {
273 .name = TYPE_CRIS_CPU,
274 .parent = TYPE_CPU,
275 .instance_size = sizeof(CRISCPU),
276 .instance_init = cris_cpu_initfn,
277 .abstract = true,
278 .class_size = sizeof(CRISCPUClass),
279 .class_init = cris_cpu_class_init,
280};
281
282static void cris_cpu_register_types(void)
283{
284 int i;
285
286 type_register_static(&cris_cpu_type_info);
287 for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) {
288 type_register_static(&cris_cpu_model_type_infos[i]);
289 }
290}
291
292type_init(cris_cpu_register_types)
293
