1/* 2 * QEMU CPU model 3 * 4 * Copyright (c) 2012 SUSE LINUX Products GmbH 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see 18 * <http://www.gnu.org/licenses/gpl-2.0.html> 19 */ 20#ifndef QEMU_CPU_H 21#define QEMU_CPU_H 22 23#include <signal.h> 24#include "hw/qdev-core.h" 25#include "exec/hwaddr.h" 26#include "qemu/thread.h" 27#include "qemu/tls.h" 28#include "qemu/typedefs.h" 29 30typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque); 31 32/** 33 * vaddr: 34 * Type wide enough to contain any #target_ulong virtual address. 35 */ 36typedef uint64_t vaddr; 37#define VADDR_PRId PRId64 38#define VADDR_PRIu PRIu64 39#define VADDR_PRIo PRIo64 40#define VADDR_PRIx PRIx64 41#define VADDR_PRIX PRIX64 42#define VADDR_MAX UINT64_MAX 43 44/** 45 * SECTION:cpu 46 * @section_id: QEMU-cpu 47 * @title: CPU Class 48 * @short_description: Base class for all CPUs 49 */ 50 51#define TYPE_CPU "cpu" 52 53#define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU) 54#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU) 55#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU) 56 57typedef struct CPUState CPUState; 58 59typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr, 60 bool is_write, bool is_exec, int opaque, 61 unsigned size); 62 63struct TranslationBlock; 64 65/** 66 * CPUClass: 67 * @class_by_name: Callback to map -cpu command line model name to an 68 * instantiatable CPU type. 69 * @reset: Callback to reset the #CPUState to its initial state. 70 * @reset_dump_flags: #CPUDumpFlags to use for reset logging. 71 * @do_interrupt: Callback for interrupt handling. 72 * @do_unassigned_access: Callback for unassigned access handling. 73 * @memory_rw_debug: Callback for GDB memory access. 74 * @dump_state: Callback for dumping state. 75 * @dump_statistics: Callback for dumping statistics. 76 * @get_arch_id: Callback for getting architecture-dependent CPU ID. 77 * @get_paging_enabled: Callback for inquiring whether paging is enabled. 78 * @get_memory_mapping: Callback for obtaining the memory mappings. 79 * @set_pc: Callback for setting the Program Counter register. 80 * @synchronize_from_tb: Callback for synchronizing state from a TCG 81 * #TranslationBlock. 82 * @get_phys_page_debug: Callback for obtaining a physical address. 83 * @gdb_read_register: Callback for letting GDB read a register. 84 * @gdb_write_register: Callback for letting GDB write a register. 85 * @vmsd: State description for migration. 86 * @gdb_num_core_regs: Number of core registers accessible to GDB. 87 * @gdb_core_xml_file: File name for core registers GDB XML description. 88 * 89 * Represents a CPU family or model. 90 */ 91typedef struct CPUClass { 92 /*< private >*/ 93 DeviceClass parent_class; 94 /*< public >*/ 95 96 ObjectClass *(*class_by_name)(const char *cpu_model); 97 98 void (*reset)(CPUState *cpu); 99 int reset_dump_flags; 100 void (*do_interrupt)(CPUState *cpu); 101 CPUUnassignedAccess do_unassigned_access; 102 int (*memory_rw_debug)(CPUState *cpu, vaddr addr, 103 uint8_t *buf, int len, bool is_write); 104 void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, 105 int flags); 106 void (*dump_statistics)(CPUState *cpu, FILE *f, 107 fprintf_function cpu_fprintf, int flags); 108 int64_t (*get_arch_id)(CPUState *cpu); 109 bool (*get_paging_enabled)(const CPUState *cpu); 110 void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, 111 Error **errp); 112 void (*set_pc)(CPUState *cpu, vaddr value); 113 void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); 114 hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); 115 int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg); 116 int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); 117 118 int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, 119 int cpuid, void *opaque); 120 int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, 121 void *opaque); 122 int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu, 123 int cpuid, void *opaque); 124 int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, 125 void *opaque); 126 127 const struct VMStateDescription *vmsd; 128 int gdb_num_core_regs; 129 const char *gdb_core_xml_file; 130} CPUClass; 131 132struct KVMState; 133struct kvm_run; 134 135/** 136 * CPUState: 137 * @cpu_index: CPU index (informative). 138 * @nr_cores: Number of cores within this CPU package. 139 * @nr_threads: Number of threads within this CPU. 140 * @numa_node: NUMA node this CPU is belonging to. 141 * @host_tid: Host thread ID. 142 * @running: #true if CPU is currently running (usermode). 143 * @created: Indicates whether the CPU thread has been successfully created. 144 * @interrupt_request: Indicates a pending interrupt request. 145 * @halted: Nonzero if the CPU is in suspended state. 146 * @stop: Indicates a pending stop request. 147 * @stopped: Indicates the CPU has been artificially stopped. 148 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this 149 * CPU and return to its top level loop. 150 * @singlestep_enabled: Flags for single-stepping. 151 * @env_ptr: Pointer to subclass-specific CPUArchState field. 152 * @current_tb: Currently executing TB. 153 * @gdb_regs: Additional GDB registers. 154 * @gdb_num_regs: Number of total registers accessible to GDB. 155 * @gdb_num_g_regs: Number of registers in GDB 'g' packets. 156 * @next_cpu: Next CPU sharing TB cache. 157 * @kvm_fd: vCPU file descriptor for KVM. 158 * 159 * State of one CPU core or thread. 160 */ 161struct CPUState { 162 /*< private >*/ 163 DeviceState parent_obj; 164 /*< public >*/ 165 166 int nr_cores; 167 int nr_threads; 168 int numa_node; 169 170 struct QemuThread *thread; 171#ifdef _WIN32 172 HANDLE hThread; 173#endif 174 int thread_id; 175 uint32_t host_tid; 176 bool running; 177 struct QemuCond *halt_cond; 178 struct qemu_work_item *queued_work_first, *queued_work_last; 179 bool thread_kicked; 180 bool created; 181 bool stop; 182 bool stopped; 183 volatile sig_atomic_t exit_request; 184 volatile sig_atomic_t tcg_exit_req; 185 uint32_t interrupt_request; 186 int singlestep_enabled; 187 188 void *env_ptr; /* CPUArchState */ 189 struct TranslationBlock *current_tb; 190 struct GDBRegisterState *gdb_regs; 191 int gdb_num_regs; 192 int gdb_num_g_regs; 193 CPUState *next_cpu; 194 195 int kvm_fd; 196 bool kvm_vcpu_dirty; 197 struct KVMState *kvm_state; 198 struct kvm_run *kvm_run; 199 200 /* TODO Move common fields from CPUArchState here. */ 201 int cpu_index; /* used by alpha TCG */ 202 uint32_t halted; /* used by alpha, cris, ppc TCG */ 203}; 204 205extern CPUState *first_cpu; 206 207DECLARE_TLS(CPUState *, current_cpu); 208#define current_cpu tls_var(current_cpu) 209 210/** 211 * cpu_paging_enabled: 212 * @cpu: The CPU whose state is to be inspected. 213 * 214 * Returns: %true if paging is enabled, %false otherwise. 215 */ 216bool cpu_paging_enabled(const CPUState *cpu); 217 218/** 219 * cpu_get_memory_mapping: 220 * @cpu: The CPU whose memory mappings are to be obtained. 221 * @list: Where to write the memory mappings to. 222 * @errp: Pointer for reporting an #Error. 223 */ 224void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, 225 Error **errp); 226 227/** 228 * cpu_write_elf64_note: 229 * @f: pointer to a function that writes memory to a file 230 * @cpu: The CPU whose memory is to be dumped 231 * @cpuid: ID number of the CPU 232 * @opaque: pointer to the CPUState struct 233 */ 234int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, 235 int cpuid, void *opaque); 236 237/** 238 * cpu_write_elf64_qemunote: 239 * @f: pointer to a function that writes memory to a file 240 * @cpu: The CPU whose memory is to be dumped 241 * @cpuid: ID number of the CPU 242 * @opaque: pointer to the CPUState struct 243 */ 244int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, 245 void *opaque); 246 247/** 248 * cpu_write_elf32_note: 249 * @f: pointer to a function that writes memory to a file 250 * @cpu: The CPU whose memory is to be dumped 251 * @cpuid: ID number of the CPU 252 * @opaque: pointer to the CPUState struct 253 */ 254int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, 255 int cpuid, void *opaque); 256 257/** 258 * cpu_write_elf32_qemunote: 259 * @f: pointer to a function that writes memory to a file 260 * @cpu: The CPU whose memory is to be dumped 261 * @cpuid: ID number of the CPU 262 * @opaque: pointer to the CPUState struct 263 */ 264int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, 265 void *opaque); 266 267/** 268 * CPUDumpFlags: 269 * @CPU_DUMP_CODE: 270 * @CPU_DUMP_FPU: dump FPU register state, not just integer 271 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state 272 */ 273enum CPUDumpFlags { 274 CPU_DUMP_CODE = 0x00010000, 275 CPU_DUMP_FPU = 0x00020000, 276 CPU_DUMP_CCOP = 0x00040000, 277}; 278 279/** 280 * cpu_dump_state: 281 * @cpu: The CPU whose state is to be dumped. 282 * @f: File to dump to. 283 * @cpu_fprintf: Function to dump with. 284 * @flags: Flags what to dump. 285 * 286 * Dumps CPU state. 287 */ 288void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, 289 int flags); 290 291/** 292 * cpu_dump_statistics: 293 * @cpu: The CPU whose state is to be dumped. 294 * @f: File to dump to. 295 * @cpu_fprintf: Function to dump with. 296 * @flags: Flags what to dump. 297 * 298 * Dumps CPU statistics. 299 */ 300void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, 301 int flags); 302 303#ifndef CONFIG_USER_ONLY 304/** 305 * cpu_get_phys_page_debug: 306 * @cpu: The CPU to obtain the physical page address for. 307 * @addr: The virtual address. 308 * 309 * Obtains the physical page corresponding to a virtual one. 310 * Use it only for debugging because no protection checks are done. 311 * 312 * Returns: Corresponding physical page address or -1 if no page found. 313 */ 314static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) 315{ 316 CPUClass *cc = CPU_GET_CLASS(cpu); 317 318 return cc->get_phys_page_debug(cpu, addr); 319} 320#endif 321 322/** 323 * cpu_reset: 324 * @cpu: The CPU whose state is to be reset. 325 */ 326void cpu_reset(CPUState *cpu); 327 328/** 329 * cpu_class_by_name: 330 * @typename: The CPU base type. 331 * @cpu_model: The model string without any parameters. 332 * 333 * Looks up a CPU #ObjectClass matching name @cpu_model. 334 * 335 * Returns: A #CPUClass or %NULL if not matching class is found. 336 */ 337ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); 338 339/** 340 * qemu_cpu_has_work: 341 * @cpu: The vCPU to check. 342 * 343 * Checks whether the CPU has work to do. 344 * 345 * Returns: %true if the CPU has work, %false otherwise. 346 */ 347bool qemu_cpu_has_work(CPUState *cpu); 348 349/** 350 * qemu_cpu_is_self: 351 * @cpu: The vCPU to check against. 352 * 353 * Checks whether the caller is executing on the vCPU thread. 354 * 355 * Returns: %true if called from @cpu's thread, %false otherwise. 356 */ 357bool qemu_cpu_is_self(CPUState *cpu); 358 359/** 360 * qemu_cpu_kick: 361 * @cpu: The vCPU to kick. 362 * 363 * Kicks @cpu's thread. 364 */ 365void qemu_cpu_kick(CPUState *cpu); 366 367/** 368 * cpu_is_stopped: 369 * @cpu: The CPU to check. 370 * 371 * Checks whether the CPU is stopped. 372 * 373 * Returns: %true if run state is not running or if artificially stopped; 374 * %false otherwise. 375 */ 376bool cpu_is_stopped(CPUState *cpu); 377 378/** 379 * run_on_cpu: 380 * @cpu: The vCPU to run on. 381 * @func: The function to be executed. 382 * @data: Data to pass to the function. 383 * 384 * Schedules the function @func for execution on the vCPU @cpu. 385 */ 386void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); 387 388/** 389 * async_run_on_cpu: 390 * @cpu: The vCPU to run on. 391 * @func: The function to be executed. 392 * @data: Data to pass to the function. 393 * 394 * Schedules the function @func for execution on the vCPU @cpu asynchronously. 395 */ 396void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); 397 398/** 399 * qemu_for_each_cpu: 400 * @func: The function to be executed. 401 * @data: Data to pass to the function. 402 * 403 * Executes @func for each CPU. 404 */ 405void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data); 406 407/** 408 * qemu_get_cpu: 409 * @index: The CPUState@cpu_index value of the CPU to obtain. 410 * 411 * Gets a CPU matching @index. 412 * 413 * Returns: The CPU or %NULL if there is no matching CPU. 414 */ 415CPUState *qemu_get_cpu(int index); 416 417/** 418 * cpu_exists: 419 * @id: Guest-exposed CPU ID to lookup. 420 * 421 * Search for CPU with specified ID. 422 * 423 * Returns: %true - CPU is found, %false - CPU isn't found. 424 */ 425bool cpu_exists(int64_t id); 426 427#ifndef CONFIG_USER_ONLY 428 429typedef void (*CPUInterruptHandler)(CPUState *, int); 430 431extern CPUInterruptHandler cpu_interrupt_handler; 432 433/** 434 * cpu_interrupt: 435 * @cpu: The CPU to set an interrupt on. 436 * @mask: The interupts to set. 437 * 438 * Invokes the interrupt handler. 439 */ 440static inline void cpu_interrupt(CPUState *cpu, int mask) 441{ 442 cpu_interrupt_handler(cpu, mask); 443} 444 445#else /* USER_ONLY */ 446 447void cpu_interrupt(CPUState *cpu, int mask); 448 449#endif /* USER_ONLY */ 450 451#ifndef CONFIG_USER_ONLY 452 453static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr, 454 bool is_write, bool is_exec, 455 int opaque, unsigned size) 456{ 457 CPUClass *cc = CPU_GET_CLASS(cpu); 458 459 if (cc->do_unassigned_access) { 460 cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size); 461 } 462} 463 464#endif 465 466/** 467 * cpu_reset_interrupt: 468 * @cpu: The CPU to clear the interrupt on. 469 * @mask: The interrupt mask to clear. 470 * 471 * Resets interrupts on the vCPU @cpu. 472 */ 473void cpu_reset_interrupt(CPUState *cpu, int mask); 474 475/** 476 * cpu_exit: 477 * @cpu: The CPU to exit. 478 * 479 * Requests the CPU @cpu to exit execution. 480 */ 481void cpu_exit(CPUState *cpu); 482 483/** 484 * cpu_resume: 485 * @cpu: The CPU to resume. 486 * 487 * Resumes CPU, i.e. puts CPU into runnable state. 488 */ 489void cpu_resume(CPUState *cpu); 490 491/** 492 * qemu_init_vcpu: 493 * @cpu: The vCPU to initialize. 494 * 495 * Initializes a vCPU. 496 */ 497void qemu_init_vcpu(CPUState *cpu); 498 499#define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */ 500#define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */ 501#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */ 502 503/** 504 * cpu_single_step: 505 * @cpu: CPU to the flags for. 506 * @enabled: Flags to enable. 507 * 508 * Enables or disables single-stepping for @cpu. 509 */ 510void cpu_single_step(CPUState *cpu, int enabled); 511 512#ifdef CONFIG_SOFTMMU 513extern const struct VMStateDescription vmstate_cpu_common; 514#else 515#define vmstate_cpu_common vmstate_dummy 516#endif 517 518#define VMSTATE_CPU() { \ 519 .name = "parent_obj", \ 520 .size = sizeof(CPUState), \ 521 .vmsd = &vmstate_cpu_common, \ 522 .flags = VMS_STRUCT, \ 523 .offset = 0, \ 524} 525 526#endif 527