LXR qemu/target-moxie/helper.c

   1/*
   2 *  Moxie helper routines.
   3 *
   4 *  Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include <stdio.h>
  21#include <string.h>
  22#include <assert.h>
  23
  24#include "config.h"
  25#include "cpu.h"
  26#include "mmu.h"
  27#include "exec/exec-all.h"
  28#include "qemu/host-utils.h"
  29#include "helper.h"
  30
  31#define MMUSUFFIX _mmu
  32
  33#define SHIFT 0
  34#include "exec/softmmu_template.h"
  35
  36#define SHIFT 1
  37#include "exec/softmmu_template.h"
  38
  39#define SHIFT 2
  40#include "exec/softmmu_template.h"
  41
  42#define SHIFT 3
  43#include "exec/softmmu_template.h"
  44
  45/* Try to fill the TLB and return an exception if error. If retaddr is
  46   NULL, it means that the function was called in C code (i.e. not
  47   from generated code or from helper.c) */
  48void tlb_fill(CPUMoxieState *env, target_ulong addr, int is_write, int mmu_idx,
  49              uintptr_t retaddr)
  50{
  51    int ret;
  52
  53    ret = cpu_moxie_handle_mmu_fault(env, addr, is_write, mmu_idx);
  54    if (unlikely(ret)) {
  55        if (retaddr) {
  56            cpu_restore_state(env, retaddr);
  57        }
  58    }
  59    cpu_loop_exit(env);
  60}
  61
  62void helper_raise_exception(CPUMoxieState *env, int ex)
  63{
  64    env->exception_index = ex;
  65    /* Stash the exception type.  */
  66    env->sregs[2] = ex;
  67    /* Stash the address where the exception occurred.  */
  68    cpu_restore_state(env, GETPC());
  69    env->sregs[5] = env->pc;
  70    /* Jump the the exception handline routine.  */
  71    env->pc = env->sregs[1];
  72    cpu_loop_exit(env);
  73}
  74
  75uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
  76{
  77    if (unlikely(b == 0)) {
  78        helper_raise_exception(env, MOXIE_EX_DIV0);
  79        return 0;
  80    }
  81    if (unlikely(a == INT_MIN && b == -1)) {
  82        return INT_MIN;
  83    }
  84
  85    return (int32_t)a / (int32_t)b;
  86}
  87
  88uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
  89{
  90    if (unlikely(b == 0)) {
  91        helper_raise_exception(env, MOXIE_EX_DIV0);
  92        return 0;
  93    }
  94    return a / b;
  95}
  96
  97void helper_debug(CPUMoxieState *env)
  98{
  99    env->exception_index = EXCP_DEBUG;
 100    cpu_loop_exit(env);
 101}
 102
 103#if defined(CONFIG_USER_ONLY)
 104
 105void moxie_cpu_do_interrupt(CPUState *env)
 106{
 107    env->exception_index = -1;
 108}
 109
 110int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
 111                               int rw, int mmu_idx)
 112{
 113    MoxieCPU *cpu = moxie_env_get_cpu(env);
 114
 115    env->exception_index = 0xaa;
 116    env->debug1 = address;
 117    cpu_dump_state(CPU(cpu), stderr, fprintf, 0);
 118    return 1;
 119}
 120
 121#else /* !CONFIG_USER_ONLY */
 122
 123int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
 124                               int rw, int mmu_idx)
 125{
 126    MoxieMMUResult res;
 127    int prot, miss;
 128    target_ulong phy;
 129    int r = 1;
 130
 131    address &= TARGET_PAGE_MASK;
 132    prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
 133    miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
 134    if (miss) {
 135        /* handle the miss.  */
 136        phy = 0;
 137        env->exception_index = MOXIE_EX_MMU_MISS;
 138    } else {
 139        phy = res.phy;
 140        r = 0;
 141    }
 142    tlb_set_page(env, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
 143    return r;
 144}
 145
 146
 147void moxie_cpu_do_interrupt(CPUState *cs)
 148{
 149    MoxieCPU *cpu = MOXIE_CPU(cs);
 150    CPUMoxieState *env = &cpu->env;
 151
 152    switch (env->exception_index) {
 153    case MOXIE_EX_BREAK:
 154        break;
 155    default:
 156        break;
 157    }
 158}
 159
 160hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 161{
 162    MoxieCPU *cpu = MOXIE_CPU(cs);
 163    uint32_t phy = addr;
 164    MoxieMMUResult res;
 165    int miss;
 166
 167    miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
 168    if (!miss) {
 169        phy = res.phy;
 170    }
 171    return phy;
 172}
 173#endif
 174