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13#include "hw/hw.h"
14#include "hw/arm/pxa.h"
15#include "hw/arm/arm.h"
16#include "sysemu/sysemu.h"
17#include "hw/pcmcia.h"
18#include "hw/i2c/i2c.h"
19#include "hw/ssi.h"
20#include "hw/block/flash.h"
21#include "qemu/timer.h"
22#include "hw/devices.h"
23#include "hw/arm/sharpsl.h"
24#include "ui/console.h"
25#include "block/block.h"
26#include "audio/audio.h"
27#include "hw/boards.h"
28#include "sysemu/blockdev.h"
29#include "hw/sysbus.h"
30#include "exec/address-spaces.h"
31
32#undef REG_FMT
33#define REG_FMT "0x%02lx"
34
35
36#define FLASH_BASE 0x0c000000
37#define FLASH_ECCLPLB 0x00
38#define FLASH_ECCLPUB 0x04
39#define FLASH_ECCCP 0x08
40#define FLASH_ECCCNTR 0x0c
41#define FLASH_ECCCLRR 0x10
42#define FLASH_FLASHIO 0x14
43#define FLASH_FLASHCTL 0x18
44
45#define FLASHCTL_CE0 (1 << 0)
46#define FLASHCTL_CLE (1 << 1)
47#define FLASHCTL_ALE (1 << 2)
48#define FLASHCTL_WP (1 << 3)
49#define FLASHCTL_CE1 (1 << 4)
50#define FLASHCTL_RYBY (1 << 5)
51#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
52
53#define TYPE_SL_NAND "sl-nand"
54#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
55
56typedef struct {
57 SysBusDevice parent_obj;
58
59 MemoryRegion iomem;
60 DeviceState *nand;
61 uint8_t ctl;
62 uint8_t manf_id;
63 uint8_t chip_id;
64 ECCState ecc;
65} SLNANDState;
66
67static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
68{
69 SLNANDState *s = (SLNANDState *) opaque;
70 int ryby;
71
72 switch (addr) {
73#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
74 case FLASH_ECCLPLB:
75 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
76 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
77
78#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
79 case FLASH_ECCLPUB:
80 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
81 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
82
83 case FLASH_ECCCP:
84 return s->ecc.cp;
85
86 case FLASH_ECCCNTR:
87 return s->ecc.count & 0xff;
88
89 case FLASH_FLASHCTL:
90 nand_getpins(s->nand, &ryby);
91 if (ryby)
92 return s->ctl | FLASHCTL_RYBY;
93 else
94 return s->ctl;
95
96 case FLASH_FLASHIO:
97 if (size == 4) {
98 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
99 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
100 }
101 return ecc_digest(&s->ecc, nand_getio(s->nand));
102
103 default:
104 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
105 }
106 return 0;
107}
108
109static void sl_write(void *opaque, hwaddr addr,
110 uint64_t value, unsigned size)
111{
112 SLNANDState *s = (SLNANDState *) opaque;
113
114 switch (addr) {
115 case FLASH_ECCCLRR:
116
117 ecc_reset(&s->ecc);
118 break;
119
120 case FLASH_FLASHCTL:
121 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
122 nand_setpins(s->nand,
123 s->ctl & FLASHCTL_CLE,
124 s->ctl & FLASHCTL_ALE,
125 s->ctl & FLASHCTL_NCE,
126 s->ctl & FLASHCTL_WP,
127 0);
128 break;
129
130 case FLASH_FLASHIO:
131 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
132 break;
133
134 default:
135 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
136 }
137}
138
139enum {
140 FLASH_128M,
141 FLASH_1024M,
142};
143
144static const MemoryRegionOps sl_ops = {
145 .read = sl_read,
146 .write = sl_write,
147 .endianness = DEVICE_NATIVE_ENDIAN,
148};
149
150static void sl_flash_register(PXA2xxState *cpu, int size)
151{
152 DeviceState *dev;
153
154 dev = qdev_create(NULL, TYPE_SL_NAND);
155
156 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
157 if (size == FLASH_128M)
158 qdev_prop_set_uint8(dev, "chip_id", 0x73);
159 else if (size == FLASH_1024M)
160 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
161
162 qdev_init_nofail(dev);
163 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
164}
165
166static int sl_nand_init(SysBusDevice *dev)
167{
168 SLNANDState *s = SL_NAND(dev);
169 DriveInfo *nand;
170
171 s->ctl = 0;
172 nand = drive_get(IF_MTD, 0, 0);
173 s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
174
175 memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40);
176 sysbus_init_mmio(dev, &s->iomem);
177
178 return 0;
179}
180
181
182
183#define SPITZ_KEY_STROBE_NUM 11
184#define SPITZ_KEY_SENSE_NUM 7
185
186static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
187 12, 17, 91, 34, 36, 38, 39
188};
189
190static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
191 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
192};
193
194
195static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
196 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
197 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
198 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
199 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
200 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
201 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
202 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
203 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
204};
205
206#define SPITZ_GPIO_AK_INT 13
207#define SPITZ_GPIO_SYNC 16
208#define SPITZ_GPIO_ON_KEY 95
209#define SPITZ_GPIO_SWA 97
210#define SPITZ_GPIO_SWB 96
211
212
213static const int spitz_gpiomap[5] = {
214 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
215 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
216};
217
218#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
219#define SPITZ_KEYBOARD(obj) \
220 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
221
222typedef struct {
223 SysBusDevice parent_obj;
224
225 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
226 qemu_irq gpiomap[5];
227 int keymap[0x80];
228 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
229 uint16_t strobe_state;
230 uint16_t sense_state;
231
232 uint16_t pre_map[0x100];
233 uint16_t modifiers;
234 uint16_t imodifiers;
235 uint8_t fifo[16];
236 int fifopos, fifolen;
237 QEMUTimer *kbdtimer;
238} SpitzKeyboardState;
239
240static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
241{
242 int i;
243 uint16_t strobe, sense = 0;
244 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
245 strobe = s->keyrow[i] & s->strobe_state;
246 if (strobe) {
247 sense |= 1 << i;
248 if (!(s->sense_state & (1 << i)))
249 qemu_irq_raise(s->sense[i]);
250 } else if (s->sense_state & (1 << i))
251 qemu_irq_lower(s->sense[i]);
252 }
253
254 s->sense_state = sense;
255}
256
257static void spitz_keyboard_strobe(void *opaque, int line, int level)
258{
259 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
260
261 if (level)
262 s->strobe_state |= 1 << line;
263 else
264 s->strobe_state &= ~(1 << line);
265 spitz_keyboard_sense_update(s);
266}
267
268static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
269{
270 int spitz_keycode = s->keymap[keycode & 0x7f];
271 if (spitz_keycode == -1)
272 return;
273
274
275 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
276 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
277 return;
278 }
279
280 if (keycode & 0x80)
281 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
282 else
283 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
284
285 spitz_keyboard_sense_update(s);
286}
287
288#define MOD_SHIFT (1 << 7)
289#define MOD_CTRL (1 << 8)
290#define MOD_FN (1 << 9)
291
292#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
293
294static void spitz_keyboard_handler(void *opaque, int keycode)
295{
296 SpitzKeyboardState *s = opaque;
297 uint16_t code;
298 int mapcode;
299 switch (keycode) {
300 case 0x2a:
301 s->modifiers |= 1;
302 break;
303 case 0xaa:
304 s->modifiers &= ~1;
305 break;
306 case 0x36:
307 s->modifiers |= 2;
308 break;
309 case 0xb6:
310 s->modifiers &= ~2;
311 break;
312 case 0x1d:
313 s->modifiers |= 4;
314 break;
315 case 0x9d:
316 s->modifiers &= ~4;
317 break;
318 case 0x38:
319 s->modifiers |= 8;
320 break;
321 case 0xb8:
322 s->modifiers &= ~8;
323 break;
324 }
325
326 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
327 (keycode | MOD_SHIFT) :
328 (keycode & ~MOD_SHIFT))];
329
330 if (code != mapcode) {
331#if 0
332 if ((code & MOD_SHIFT) && !(s->modifiers & 1))
333 QUEUE_KEY(0x2a | (keycode & 0x80));
334 if ((code & MOD_CTRL ) && !(s->modifiers & 4))
335 QUEUE_KEY(0x1d | (keycode & 0x80));
336 if ((code & MOD_FN ) && !(s->modifiers & 8))
337 QUEUE_KEY(0x38 | (keycode & 0x80));
338 if ((code & MOD_FN ) && (s->modifiers & 1))
339 QUEUE_KEY(0x2a | (~keycode & 0x80));
340 if ((code & MOD_FN ) && (s->modifiers & 2))
341 QUEUE_KEY(0x36 | (~keycode & 0x80));
342#else
343 if (keycode & 0x80) {
344 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
345 QUEUE_KEY(0x2a | 0x80);
346 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
347 QUEUE_KEY(0x1d | 0x80);
348 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
349 QUEUE_KEY(0x38 | 0x80);
350 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
351 QUEUE_KEY(0x2a);
352 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
353 QUEUE_KEY(0x36);
354 s->imodifiers = 0;
355 } else {
356 if ((code & MOD_SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
357 QUEUE_KEY(0x2a);
358 s->imodifiers |= 1;
359 }
360 if ((code & MOD_CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
361 QUEUE_KEY(0x1d);
362 s->imodifiers |= 4;
363 }
364 if ((code & MOD_FN ) && !((s->modifiers | s->imodifiers) & 8)) {
365 QUEUE_KEY(0x38);
366 s->imodifiers |= 8;
367 }
368 if ((code & MOD_FN ) && (s->modifiers & 1) &&
369 !(s->imodifiers & 0x10)) {
370 QUEUE_KEY(0x2a | 0x80);
371 s->imodifiers |= 0x10;
372 }
373 if ((code & MOD_FN ) && (s->modifiers & 2) &&
374 !(s->imodifiers & 0x20)) {
375 QUEUE_KEY(0x36 | 0x80);
376 s->imodifiers |= 0x20;
377 }
378 }
379#endif
380 }
381
382 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
383}
384
385static void spitz_keyboard_tick(void *opaque)
386{
387 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
388
389 if (s->fifolen) {
390 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
391 s->fifolen --;
392 if (s->fifopos >= 16)
393 s->fifopos = 0;
394 }
395
396 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
397 get_ticks_per_sec() / 32);
398}
399
400static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
401{
402 int i;
403 for (i = 0; i < 0x100; i ++)
404 s->pre_map[i] = i;
405 s->pre_map[0x02 | MOD_SHIFT ] = 0x02 | MOD_SHIFT;
406 s->pre_map[0x28 | MOD_SHIFT ] = 0x03 | MOD_SHIFT;
407 s->pre_map[0x04 | MOD_SHIFT ] = 0x04 | MOD_SHIFT;
408 s->pre_map[0x05 | MOD_SHIFT ] = 0x05 | MOD_SHIFT;
409 s->pre_map[0x06 | MOD_SHIFT ] = 0x06 | MOD_SHIFT;
410 s->pre_map[0x08 | MOD_SHIFT ] = 0x07 | MOD_SHIFT;
411 s->pre_map[0x28 ] = 0x08 | MOD_SHIFT;
412 s->pre_map[0x0a | MOD_SHIFT ] = 0x09 | MOD_SHIFT;
413 s->pre_map[0x0b | MOD_SHIFT ] = 0x0a | MOD_SHIFT;
414 s->pre_map[0x29 | MOD_SHIFT ] = 0x0b | MOD_SHIFT;
415 s->pre_map[0x03 | MOD_SHIFT ] = 0x0c | MOD_SHIFT;
416 s->pre_map[0xd3 ] = 0x0e | MOD_FN;
417 s->pre_map[0x3a ] = 0x0f | MOD_FN;
418 s->pre_map[0x07 | MOD_SHIFT ] = 0x11 | MOD_FN;
419 s->pre_map[0x0d ] = 0x12 | MOD_FN;
420 s->pre_map[0x0d | MOD_SHIFT ] = 0x13 | MOD_FN;
421 s->pre_map[0x1a ] = 0x14 | MOD_FN;
422 s->pre_map[0x1b ] = 0x15 | MOD_FN;
423 s->pre_map[0x1a | MOD_SHIFT ] = 0x16 | MOD_FN;
424 s->pre_map[0x1b | MOD_SHIFT ] = 0x17 | MOD_FN;
425 s->pre_map[0x27 ] = 0x22 | MOD_FN;
426 s->pre_map[0x27 | MOD_SHIFT ] = 0x23 | MOD_FN;
427 s->pre_map[0x09 | MOD_SHIFT ] = 0x24 | MOD_FN;
428 s->pre_map[0x2b ] = 0x25 | MOD_FN;
429 s->pre_map[0x2b | MOD_SHIFT ] = 0x26 | MOD_FN;
430 s->pre_map[0x0c | MOD_SHIFT ] = 0x30 | MOD_FN;
431 s->pre_map[0x33 | MOD_SHIFT ] = 0x33 | MOD_FN;
432 s->pre_map[0x35 ] = 0x33 | MOD_SHIFT;
433 s->pre_map[0x34 | MOD_SHIFT ] = 0x34 | MOD_FN;
434 s->pre_map[0x35 | MOD_SHIFT ] = 0x34 | MOD_SHIFT;
435 s->pre_map[0x49 ] = 0x48 | MOD_FN;
436 s->pre_map[0x51 ] = 0x50 | MOD_FN;
437
438 s->modifiers = 0;
439 s->imodifiers = 0;
440 s->fifopos = 0;
441 s->fifolen = 0;
442}
443
444#undef MOD_SHIFT
445#undef MOD_CTRL
446#undef MOD_FN
447
448static int spitz_keyboard_post_load(void *opaque, int version_id)
449{
450 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
451
452
453 memset(s->keyrow, 0, sizeof(s->keyrow));
454 spitz_keyboard_sense_update(s);
455 s->modifiers = 0;
456 s->imodifiers = 0;
457 s->fifopos = 0;
458 s->fifolen = 0;
459
460 return 0;
461}
462
463static void spitz_keyboard_register(PXA2xxState *cpu)
464{
465 int i;
466 DeviceState *dev;
467 SpitzKeyboardState *s;
468
469 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
470 s = SPITZ_KEYBOARD(dev);
471
472 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
473 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
474
475 for (i = 0; i < 5; i ++)
476 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
477
478 if (!graphic_rotate)
479 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
480
481 for (i = 0; i < 5; i++)
482 qemu_set_irq(s->gpiomap[i], 0);
483
484 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
485 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
486 qdev_get_gpio_in(dev, i));
487
488 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
489
490 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
491}
492
493static int spitz_keyboard_init(SysBusDevice *sbd)
494{
495 DeviceState *dev = DEVICE(sbd);
496 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
497 int i, j;
498
499 for (i = 0; i < 0x80; i ++)
500 s->keymap[i] = -1;
501 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
502 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
503 if (spitz_keymap[i][j] != -1)
504 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
505
506 spitz_keyboard_pre_map(s);
507
508 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
509 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
510 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
511
512 return 0;
513}
514
515
516
517#define LCDTG_RESCTL 0x00
518#define LCDTG_PHACTRL 0x01
519#define LCDTG_DUTYCTRL 0x02
520#define LCDTG_POWERREG0 0x03
521#define LCDTG_POWERREG1 0x04
522#define LCDTG_GPOR3 0x05
523#define LCDTG_PICTRL 0x06
524#define LCDTG_POLCTRL 0x07
525
526typedef struct {
527 SSISlave ssidev;
528 uint32_t bl_intensity;
529 uint32_t bl_power;
530} SpitzLCDTG;
531
532static void spitz_bl_update(SpitzLCDTG *s)
533{
534 if (s->bl_power && s->bl_intensity)
535 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
536 else
537 zaurus_printf("LCD Backlight now off\n");
538}
539
540
541static SpitzLCDTG *spitz_lcdtg;
542
543static inline void spitz_bl_bit5(void *opaque, int line, int level)
544{
545 SpitzLCDTG *s = spitz_lcdtg;
546 int prev = s->bl_intensity;
547
548 if (level)
549 s->bl_intensity &= ~0x20;
550 else
551 s->bl_intensity |= 0x20;
552
553 if (s->bl_power && prev != s->bl_intensity)
554 spitz_bl_update(s);
555}
556
557static inline void spitz_bl_power(void *opaque, int line, int level)
558{
559 SpitzLCDTG *s = spitz_lcdtg;
560 s->bl_power = !!level;
561 spitz_bl_update(s);
562}
563
564static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
565{
566 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
567 int addr;
568 addr = value >> 5;
569 value &= 0x1f;
570
571 switch (addr) {
572 case LCDTG_RESCTL:
573 if (value)
574 zaurus_printf("LCD in QVGA mode\n");
575 else
576 zaurus_printf("LCD in VGA mode\n");
577 break;
578
579 case LCDTG_DUTYCTRL:
580 s->bl_intensity &= ~0x1f;
581 s->bl_intensity |= value;
582 if (s->bl_power)
583 spitz_bl_update(s);
584 break;
585
586 case LCDTG_POWERREG0:
587
588 break;
589 }
590 return 0;
591}
592
593static int spitz_lcdtg_init(SSISlave *dev)
594{
595 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
596
597 spitz_lcdtg = s;
598 s->bl_power = 0;
599 s->bl_intensity = 0x20;
600
601 return 0;
602}
603
604
605
606#define CORGI_SSP_PORT 2
607
608#define SPITZ_GPIO_LCDCON_CS 53
609#define SPITZ_GPIO_ADS7846_CS 14
610#define SPITZ_GPIO_MAX1111_CS 20
611#define SPITZ_GPIO_TP_INT 11
612
613static DeviceState *max1111;
614
615
616typedef struct {
617 SSISlave ssidev;
618 SSIBus *bus[3];
619 uint32_t enable[3];
620} CorgiSSPState;
621
622static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
623{
624 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
625 int i;
626
627 for (i = 0; i < 3; i++) {
628 if (s->enable[i]) {
629 return ssi_transfer(s->bus[i], value);
630 }
631 }
632 return 0;
633}
634
635static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
636{
637 CorgiSSPState *s = (CorgiSSPState *)opaque;
638 assert(line >= 0 && line < 3);
639 s->enable[line] = !level;
640}
641
642#define MAX1111_BATT_VOLT 1
643#define MAX1111_BATT_TEMP 2
644#define MAX1111_ACIN_VOLT 3
645
646#define SPITZ_BATTERY_TEMP 0xe0
647#define SPITZ_BATTERY_VOLT 0xd0
648#define SPITZ_CHARGEON_ACIN 0x80
649
650static void spitz_adc_temp_on(void *opaque, int line, int level)
651{
652 if (!max1111)
653 return;
654
655 if (level)
656 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
657 else
658 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
659}
660
661static int corgi_ssp_init(SSISlave *dev)
662{
663 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
664
665 qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
666 s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
667 s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
668 s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
669
670 return 0;
671}
672
673static void spitz_ssp_attach(PXA2xxState *cpu)
674{
675 DeviceState *mux;
676 DeviceState *dev;
677 void *bus;
678
679 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
680
681 bus = qdev_get_child_bus(mux, "ssi0");
682 ssi_create_slave(bus, "spitz-lcdtg");
683
684 bus = qdev_get_child_bus(mux, "ssi1");
685 dev = ssi_create_slave(bus, "ads7846");
686 qdev_connect_gpio_out(dev, 0,
687 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
688
689 bus = qdev_get_child_bus(mux, "ssi2");
690 max1111 = ssi_create_slave(bus, "max1111");
691 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
692 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
693 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
694
695 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
696 qdev_get_gpio_in(mux, 0));
697 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
698 qdev_get_gpio_in(mux, 1));
699 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
700 qdev_get_gpio_in(mux, 2));
701}
702
703
704
705static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
706{
707 PCMCIACardState *md;
708 DriveInfo *dinfo;
709
710 dinfo = drive_get(IF_IDE, 0, 0);
711 if (!dinfo || dinfo->media_cd)
712 return;
713 md = dscm1xxxx_init(dinfo);
714 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
715}
716
717
718
719#define AKITA_MAX_ADDR 0x18
720#define SPITZ_WM_ADDRL 0x1b
721#define SPITZ_WM_ADDRH 0x1a
722
723#define SPITZ_GPIO_WM 5
724
725static void spitz_wm8750_addr(void *opaque, int line, int level)
726{
727 I2CSlave *wm = (I2CSlave *) opaque;
728 if (level)
729 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
730 else
731 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
732}
733
734static void spitz_i2c_setup(PXA2xxState *cpu)
735{
736
737 i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
738
739 DeviceState *wm;
740
741
742 wm = i2c_create_slave(bus, "wm8750", 0);
743
744 spitz_wm8750_addr(wm, 0, 0);
745 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
746 qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
747
748 cpu->i2s->opaque = wm;
749 cpu->i2s->codec_out = wm8750_dac_dat;
750 cpu->i2s->codec_in = wm8750_adc_dat;
751 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
752}
753
754static void spitz_akita_i2c_setup(PXA2xxState *cpu)
755{
756
757 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
758 AKITA_MAX_ADDR);
759}
760
761
762
763static void spitz_out_switch(void *opaque, int line, int level)
764{
765 switch (line) {
766 case 0:
767 zaurus_printf("Charging %s.\n", level ? "off" : "on");
768 break;
769 case 1:
770 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
771 break;
772 case 2:
773 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
774 break;
775 case 3:
776 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
777 break;
778 case 4:
779 spitz_bl_bit5(opaque, line, level);
780 break;
781 case 5:
782 spitz_bl_power(opaque, line, level);
783 break;
784 case 6:
785 spitz_adc_temp_on(opaque, line, level);
786 break;
787 }
788}
789
790#define SPITZ_SCP_LED_GREEN 1
791#define SPITZ_SCP_JK_B 2
792#define SPITZ_SCP_CHRG_ON 3
793#define SPITZ_SCP_MUTE_L 4
794#define SPITZ_SCP_MUTE_R 5
795#define SPITZ_SCP_CF_POWER 6
796#define SPITZ_SCP_LED_ORANGE 7
797#define SPITZ_SCP_JK_A 8
798#define SPITZ_SCP_ADC_TEMP_ON 9
799#define SPITZ_SCP2_IR_ON 1
800#define SPITZ_SCP2_AKIN_PULLUP 2
801#define SPITZ_SCP2_BACKLIGHT_CONT 7
802#define SPITZ_SCP2_BACKLIGHT_ON 8
803#define SPITZ_SCP2_MIC_BIAS 9
804
805static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
806 DeviceState *scp0, DeviceState *scp1)
807{
808 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
809
810 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
811 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
812 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
813 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
814
815 if (scp1) {
816 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
817 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
818 }
819
820 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
821}
822
823#define SPITZ_GPIO_HSYNC 22
824#define SPITZ_GPIO_SD_DETECT 9
825#define SPITZ_GPIO_SD_WP 81
826#define SPITZ_GPIO_ON_RESET 89
827#define SPITZ_GPIO_BAT_COVER 90
828#define SPITZ_GPIO_CF1_IRQ 105
829#define SPITZ_GPIO_CF1_CD 94
830#define SPITZ_GPIO_CF2_IRQ 106
831#define SPITZ_GPIO_CF2_CD 93
832
833static int spitz_hsync;
834
835static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
836{
837 PXA2xxState *cpu = (PXA2xxState *) opaque;
838 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
839 spitz_hsync ^= 1;
840}
841
842static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
843{
844 qemu_irq lcd_hsync;
845
846
847
848
849
850
851 spitz_hsync = 0;
852 lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
853 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
854 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
855
856
857 pxa2xx_mmci_handlers(cpu->mmc,
858 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
859 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
860
861
862 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
863
864
865 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
866
867
868 if (slots >= 1)
869 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
870 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
871 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
872 if (slots >= 2)
873 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
874 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
875 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
876}
877
878
879enum spitz_model_e { spitz, akita, borzoi, terrier };
880
881#define SPITZ_RAM 0x04000000
882#define SPITZ_ROM 0x00800000
883
884static struct arm_boot_info spitz_binfo = {
885 .loader_start = PXA2XX_SDRAM_BASE,
886 .ram_size = 0x04000000,
887};
888
889static void spitz_common_init(QEMUMachineInitArgs *args,
890 enum spitz_model_e model, int arm_id)
891{
892 PXA2xxState *mpu;
893 DeviceState *scp0, *scp1 = NULL;
894 MemoryRegion *address_space_mem = get_system_memory();
895 MemoryRegion *rom = g_new(MemoryRegion, 1);
896 const char *cpu_model = args->cpu_model;
897
898 if (!cpu_model)
899 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
900
901
902 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
903
904 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
905
906 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
907 vmstate_register_ram_global(rom);
908 memory_region_set_readonly(rom, true);
909 memory_region_add_subregion(address_space_mem, 0, rom);
910
911
912 spitz_keyboard_register(mpu);
913
914 spitz_ssp_attach(mpu);
915
916 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
917 if (model != akita) {
918 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
919 }
920
921 spitz_scoop_gpio_setup(mpu, scp0, scp1);
922
923 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
924
925 spitz_i2c_setup(mpu);
926
927 if (model == akita)
928 spitz_akita_i2c_setup(mpu);
929
930 if (model == terrier)
931
932 spitz_microdrive_attach(mpu, 1);
933 else if (model != akita)
934
935 spitz_microdrive_attach(mpu, 0);
936
937 spitz_binfo.kernel_filename = args->kernel_filename;
938 spitz_binfo.kernel_cmdline = args->kernel_cmdline;
939 spitz_binfo.initrd_filename = args->initrd_filename;
940 spitz_binfo.board_id = arm_id;
941 arm_load_kernel(mpu->cpu, &spitz_binfo);
942 sl_bootparam_write(SL_PXA_PARAM_BASE);
943}
944
945static void spitz_init(QEMUMachineInitArgs *args)
946{
947 spitz_common_init(args, spitz, 0x2c9);
948}
949
950static void borzoi_init(QEMUMachineInitArgs *args)
951{
952 spitz_common_init(args, borzoi, 0x33f);
953}
954
955static void akita_init(QEMUMachineInitArgs *args)
956{
957 spitz_common_init(args, akita, 0x2e8);
958}
959
960static void terrier_init(QEMUMachineInitArgs *args)
961{
962 spitz_common_init(args, terrier, 0x33f);
963}
964
965static QEMUMachine akitapda_machine = {
966 .name = "akita",
967 .desc = "Akita PDA (PXA270)",
968 .init = akita_init,
969};
970
971static QEMUMachine spitzpda_machine = {
972 .name = "spitz",
973 .desc = "Spitz PDA (PXA270)",
974 .init = spitz_init,
975};
976
977static QEMUMachine borzoipda_machine = {
978 .name = "borzoi",
979 .desc = "Borzoi PDA (PXA270)",
980 .init = borzoi_init,
981};
982
983static QEMUMachine terrierpda_machine = {
984 .name = "terrier",
985 .desc = "Terrier PDA (PXA270)",
986 .init = terrier_init,
987};
988
989static void spitz_machine_init(void)
990{
991 qemu_register_machine(&akitapda_machine);
992 qemu_register_machine(&spitzpda_machine);
993 qemu_register_machine(&borzoipda_machine);
994 qemu_register_machine(&terrierpda_machine);
995}
996
997machine_init(spitz_machine_init);
998
999static bool is_version_0(void *opaque, int version_id)
1000{
1001 return version_id == 0;
1002}
1003
1004static VMStateDescription vmstate_sl_nand_info = {
1005 .name = "sl-nand",
1006 .version_id = 0,
1007 .minimum_version_id = 0,
1008 .minimum_version_id_old = 0,
1009 .fields = (VMStateField []) {
1010 VMSTATE_UINT8(ctl, SLNANDState),
1011 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1012 VMSTATE_END_OF_LIST(),
1013 },
1014};
1015
1016static Property sl_nand_properties[] = {
1017 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1018 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1019 DEFINE_PROP_END_OF_LIST(),
1020};
1021
1022static void sl_nand_class_init(ObjectClass *klass, void *data)
1023{
1024 DeviceClass *dc = DEVICE_CLASS(klass);
1025 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1026
1027 k->init = sl_nand_init;
1028 dc->vmsd = &vmstate_sl_nand_info;
1029 dc->props = sl_nand_properties;
1030}
1031
1032static const TypeInfo sl_nand_info = {
1033 .name = TYPE_SL_NAND,
1034 .parent = TYPE_SYS_BUS_DEVICE,
1035 .instance_size = sizeof(SLNANDState),
1036 .class_init = sl_nand_class_init,
1037};
1038
1039static VMStateDescription vmstate_spitz_kbd = {
1040 .name = "spitz-keyboard",
1041 .version_id = 1,
1042 .minimum_version_id = 0,
1043 .minimum_version_id_old = 0,
1044 .post_load = spitz_keyboard_post_load,
1045 .fields = (VMStateField []) {
1046 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1047 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1048 VMSTATE_UNUSED_TEST(is_version_0, 5),
1049 VMSTATE_END_OF_LIST(),
1050 },
1051};
1052
1053static Property spitz_keyboard_properties[] = {
1054 DEFINE_PROP_END_OF_LIST(),
1055};
1056
1057static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1058{
1059 DeviceClass *dc = DEVICE_CLASS(klass);
1060 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1061
1062 k->init = spitz_keyboard_init;
1063 dc->vmsd = &vmstate_spitz_kbd;
1064 dc->props = spitz_keyboard_properties;
1065}
1066
1067static const TypeInfo spitz_keyboard_info = {
1068 .name = TYPE_SPITZ_KEYBOARD,
1069 .parent = TYPE_SYS_BUS_DEVICE,
1070 .instance_size = sizeof(SpitzKeyboardState),
1071 .class_init = spitz_keyboard_class_init,
1072};
1073
1074static const VMStateDescription vmstate_corgi_ssp_regs = {
1075 .name = "corgi-ssp",
1076 .version_id = 2,
1077 .minimum_version_id = 2,
1078 .minimum_version_id_old = 2,
1079 .fields = (VMStateField []) {
1080 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1081 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1082 VMSTATE_END_OF_LIST(),
1083 }
1084};
1085
1086static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1087{
1088 DeviceClass *dc = DEVICE_CLASS(klass);
1089 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1090
1091 k->init = corgi_ssp_init;
1092 k->transfer = corgi_ssp_transfer;
1093 dc->vmsd = &vmstate_corgi_ssp_regs;
1094}
1095
1096static const TypeInfo corgi_ssp_info = {
1097 .name = "corgi-ssp",
1098 .parent = TYPE_SSI_SLAVE,
1099 .instance_size = sizeof(CorgiSSPState),
1100 .class_init = corgi_ssp_class_init,
1101};
1102
1103static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1104 .name = "spitz-lcdtg",
1105 .version_id = 1,
1106 .minimum_version_id = 1,
1107 .minimum_version_id_old = 1,
1108 .fields = (VMStateField []) {
1109 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1110 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1111 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1112 VMSTATE_END_OF_LIST(),
1113 }
1114};
1115
1116static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1117{
1118 DeviceClass *dc = DEVICE_CLASS(klass);
1119 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1120
1121 k->init = spitz_lcdtg_init;
1122 k->transfer = spitz_lcdtg_transfer;
1123 dc->vmsd = &vmstate_spitz_lcdtg_regs;
1124}
1125
1126static const TypeInfo spitz_lcdtg_info = {
1127 .name = "spitz-lcdtg",
1128 .parent = TYPE_SSI_SLAVE,
1129 .instance_size = sizeof(SpitzLCDTG),
1130 .class_init = spitz_lcdtg_class_init,
1131};
1132
1133static void spitz_register_types(void)
1134{
1135 type_register_static(&corgi_ssp_info);
1136 type_register_static(&spitz_lcdtg_info);
1137 type_register_static(&spitz_keyboard_info);
1138 type_register_static(&sl_nand_info);
1139}
1140
1141type_init(spitz_register_types)
1142
