1#ifndef QEMU_HW_ACPI_H
2#define QEMU_HW_ACPI_H
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22#include "qapi/error.h"
23#include "qemu/typedefs.h"
24#include "qemu/notify.h"
25#include "qemu/option.h"
26#include "exec/memory.h"
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30
31#define ACPI_GPE_REGISTER_WIDTH 8
32#define ACPI_PM1_REGISTER_WIDTH 16
33#define ACPI_PM2_REGISTER_WIDTH 8
34#define ACPI_PM_TIMER_WIDTH 32
35
36
37#define PM_TIMER_FREQUENCY 3579545
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45
46#define ACPI_BITMASK_TIMER_STATUS 0x0001
47#define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
48#define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
49#define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
50#define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
51#define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
52#define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000
53#define ACPI_BITMASK_WAKE_STATUS 0x8000
54
55#define ACPI_BITMASK_ALL_FIXED_STATUS (\
56 ACPI_BITMASK_TIMER_STATUS | \
57 ACPI_BITMASK_BUS_MASTER_STATUS | \
58 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
59 ACPI_BITMASK_POWER_BUTTON_STATUS | \
60 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
61 ACPI_BITMASK_RT_CLOCK_STATUS | \
62 ACPI_BITMASK_WAKE_STATUS)
63
64
65#define ACPI_BITMASK_TIMER_ENABLE 0x0001
66#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
67#define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
68#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
69#define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
70#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000
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72
73#define ACPI_BITMASK_SCI_ENABLE 0x0001
74#define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
75#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
76#define ACPI_BITMASK_SLEEP_TYPE 0x1C00
77#define ACPI_BITMASK_SLEEP_ENABLE 0x2000
78
79
80#define ACPI_BITMASK_ARB_DISABLE 0x0001
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82
83typedef struct ACPIPMTimer ACPIPMTimer;
84typedef struct ACPIPM1EVT ACPIPM1EVT;
85typedef struct ACPIPM1CNT ACPIPM1CNT;
86typedef struct ACPIGPE ACPIGPE;
87typedef struct ACPIREGS ACPIREGS;
88
89typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
90
91struct ACPIPMTimer {
92 QEMUTimer *timer;
93 MemoryRegion io;
94 int64_t overflow_time;
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96 acpi_update_sci_fn update_sci;
97};
98
99struct ACPIPM1EVT {
100 MemoryRegion io;
101 uint16_t sts;
102 uint16_t en;
103 acpi_update_sci_fn update_sci;
104};
105
106struct ACPIPM1CNT {
107 MemoryRegion io;
108 uint16_t cnt;
109 uint8_t s4_val;
110};
111
112struct ACPIGPE {
113 uint8_t len;
114
115 uint8_t *sts;
116 uint8_t *en;
117};
118
119struct ACPIREGS {
120 ACPIPMTimer tmr;
121 ACPIGPE gpe;
122 struct {
123 ACPIPM1EVT evt;
124 ACPIPM1CNT cnt;
125 } pm1;
126 Notifier wakeup;
127};
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129
130void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
131void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
132void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
133 MemoryRegion *parent);
134void acpi_pm_tmr_reset(ACPIREGS *ar);
135
136#include "qemu/timer.h"
137static inline int64_t acpi_pm_tmr_get_clock(void)
138{
139 return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
140 get_ticks_per_sec());
141}
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143
144uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
145void acpi_pm1_evt_power_down(ACPIREGS *ar);
146void acpi_pm1_evt_reset(ACPIREGS *ar);
147void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
148 MemoryRegion *parent);
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150
151void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val);
152void acpi_pm1_cnt_update(ACPIREGS *ar,
153 bool sci_enable, bool sci_disable);
154void acpi_pm1_cnt_reset(ACPIREGS *ar);
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157void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
158void acpi_gpe_reset(ACPIREGS *ar);
159
160void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
161uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
162
163
164extern int acpi_enabled;
165extern char unsigned *acpi_tables;
166extern size_t acpi_tables_len;
167
168uint8_t *acpi_table_first(void);
169uint8_t *acpi_table_next(uint8_t *current);
170unsigned acpi_table_len(void *current);
171void acpi_table_add(const QemuOpts *opts, Error **errp);
172void acpi_table_add_builtin(const QemuOpts *opts, Error **errp);
173
174#endif
175