LXR qemu/linux-headers/asm-mips/kvm.h

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 2012  MIPS Technologies, Inc.  All rights reserved.
   7 * Copyright (C) 2013 Cavium, Inc.
   8 * Authors: Sanjay Lal <sanjayl@kymasys.com>
   9 */
  10
  11#ifndef __LINUX_KVM_MIPS_H
  12#define __LINUX_KVM_MIPS_H
  13
  14#include <linux/types.h>
  15
  16/*
  17 * KVM MIPS specific structures and definitions.
  18 *
  19 * Some parts derived from the x86 version of this file.
  20 */
  21
  22/*
  23 * for KVM_GET_REGS and KVM_SET_REGS
  24 *
  25 * If Config[AT] is zero (32-bit CPU), the register contents are
  26 * stored in the lower 32-bits of the struct kvm_regs fields and sign
  27 * extended to 64-bits.
  28 */
  29struct kvm_regs {
  30        /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
  31        __u64 gpr[32];
  32        __u64 hi;
  33        __u64 lo;
  34        __u64 pc;
  35};
  36
  37/*
  38 * for KVM_GET_FPU and KVM_SET_FPU
  39 *
  40 * If Status[FR] is zero (32-bit FPU), the upper 32-bits of the FPRs
  41 * are zero filled.
  42 */
  43struct kvm_fpu {
  44        __u64 fpr[32];
  45        __u32 fir;
  46        __u32 fccr;
  47        __u32 fexr;
  48        __u32 fenr;
  49        __u32 fcsr;
  50        __u32 pad;
  51};
  52
  53
  54/*
  55 * For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access CP0
  56 * registers.  The id field is broken down as follows:
  57 *
  58 *  bits[2..0]   - Register 'sel' index.
  59 *  bits[7..3]   - Register 'rd'  index.
  60 *  bits[15..8]  - Must be zero.
  61 *  bits[31..16] - 1 -> CP0 registers.
  62 *  bits[51..32] - Must be zero.
  63 *  bits[63..52] - As per linux/kvm.h
  64 *
  65 * Other sets registers may be added in the future.  Each set would
  66 * have its own identifier in bits[31..16].
  67 *
  68 * The registers defined in struct kvm_regs are also accessible, the
  69 * id values for these are below.
  70 */
  71
  72#define KVM_REG_MIPS_R0 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0)
  73#define KVM_REG_MIPS_R1 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 1)
  74#define KVM_REG_MIPS_R2 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 2)
  75#define KVM_REG_MIPS_R3 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 3)
  76#define KVM_REG_MIPS_R4 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 4)
  77#define KVM_REG_MIPS_R5 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 5)
  78#define KVM_REG_MIPS_R6 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 6)
  79#define KVM_REG_MIPS_R7 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 7)
  80#define KVM_REG_MIPS_R8 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 8)
  81#define KVM_REG_MIPS_R9 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 9)
  82#define KVM_REG_MIPS_R10 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 10)
  83#define KVM_REG_MIPS_R11 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 11)
  84#define KVM_REG_MIPS_R12 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 12)
  85#define KVM_REG_MIPS_R13 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 13)
  86#define KVM_REG_MIPS_R14 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 14)
  87#define KVM_REG_MIPS_R15 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 15)
  88#define KVM_REG_MIPS_R16 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 16)
  89#define KVM_REG_MIPS_R17 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 17)
  90#define KVM_REG_MIPS_R18 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 18)
  91#define KVM_REG_MIPS_R19 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 19)
  92#define KVM_REG_MIPS_R20 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 20)
  93#define KVM_REG_MIPS_R21 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 21)
  94#define KVM_REG_MIPS_R22 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 22)
  95#define KVM_REG_MIPS_R23 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 23)
  96#define KVM_REG_MIPS_R24 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 24)
  97#define KVM_REG_MIPS_R25 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 25)
  98#define KVM_REG_MIPS_R26 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 26)
  99#define KVM_REG_MIPS_R27 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 27)
 100#define KVM_REG_MIPS_R28 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 28)
 101#define KVM_REG_MIPS_R29 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 29)
 102#define KVM_REG_MIPS_R30 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 30)
 103#define KVM_REG_MIPS_R31 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 31)
 104
 105#define KVM_REG_MIPS_HI (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 32)
 106#define KVM_REG_MIPS_LO (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 33)
 107#define KVM_REG_MIPS_PC (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 34)
 108
 109/*
 110 * KVM MIPS specific structures and definitions
 111 *
 112 */
 113struct kvm_debug_exit_arch {
 114        __u64 epc;
 115};
 116
 117/* for KVM_SET_GUEST_DEBUG */
 118struct kvm_guest_debug_arch {
 119};
 120
 121/* definition of registers in kvm_run */
 122struct kvm_sync_regs {
 123};
 124
 125/* dummy definition */
 126struct kvm_sregs {
 127};
 128
 129struct kvm_mips_interrupt {
 130        /* in */
 131        __u32 cpu;
 132        __u32 irq;
 133};
 134
 135#endif /* __LINUX_KVM_MIPS_H */
 136