qemu/hw/acpi/pcihp.c
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   1/*
   2 * QEMU<->ACPI BIOS PCI hotplug interface
   3 *
   4 * QEMU supports PCI hotplug via ACPI. This module
   5 * implements the interface between QEMU and the ACPI BIOS.
   6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt
   7 *
   8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
   9 * Copyright (c) 2006 Fabrice Bellard
  10 *
  11 * This library is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU Lesser General Public
  13 * License version 2 as published by the Free Software Foundation.
  14 *
  15 * This library is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18 * Lesser General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU Lesser General Public
  21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22 *
  23 * Contributions after 2012-01-13 are licensed under the terms of the
  24 * GNU GPL, version 2 or (at your option) any later version.
  25 */
  26
  27#include "qemu/osdep.h"
  28#include "hw/acpi/pcihp.h"
  29
  30#include "hw/hw.h"
  31#include "hw/i386/pc.h"
  32#include "hw/pci/pci.h"
  33#include "hw/acpi/acpi.h"
  34#include "sysemu/sysemu.h"
  35#include "exec/ioport.h"
  36#include "exec/address-spaces.h"
  37#include "hw/pci/pci_bus.h"
  38#include "qapi/error.h"
  39#include "qom/qom-qobject.h"
  40
  41//#define DEBUG
  42
  43#ifdef DEBUG
  44# define ACPI_PCIHP_DPRINTF(format, ...)     printf(format, ## __VA_ARGS__)
  45#else
  46# define ACPI_PCIHP_DPRINTF(format, ...)     do { } while (0)
  47#endif
  48
  49#define ACPI_PCIHP_ADDR 0xae00
  50#define ACPI_PCIHP_SIZE 0x0014
  51#define PCI_UP_BASE 0x0000
  52#define PCI_DOWN_BASE 0x0004
  53#define PCI_EJ_BASE 0x0008
  54#define PCI_RMV_BASE 0x000c
  55#define PCI_SEL_BASE 0x0010
  56
  57typedef struct AcpiPciHpFind {
  58    int bsel;
  59    PCIBus *bus;
  60} AcpiPciHpFind;
  61
  62static int acpi_pcihp_get_bsel(PCIBus *bus)
  63{
  64    Error *local_err = NULL;
  65    uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
  66                                             &local_err);
  67
  68    if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
  69        if (local_err) {
  70            error_free(local_err);
  71        }
  72        return -1;
  73    } else {
  74        return bsel;
  75    }
  76}
  77
  78static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
  79{
  80    AcpiPciHpFind *find = opaque;
  81    if (find->bsel == acpi_pcihp_get_bsel(bus)) {
  82        find->bus = bus;
  83    }
  84}
  85
  86static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
  87{
  88    AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
  89
  90    if (bsel < 0) {
  91        return NULL;
  92    }
  93
  94    pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
  95
  96    /* Make bsel 0 eject root bus if bsel property is not set,
  97     * for compatibility with non acpi setups.
  98     * TODO: really needed?
  99     */
 100    if (!bsel && !find.bus) {
 101        find.bus = s->root;
 102    }
 103    return find.bus;
 104}
 105
 106static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
 107{
 108    PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
 109    DeviceClass *dc = DEVICE_GET_CLASS(dev);
 110    /*
 111     * ACPI doesn't allow hotplug of bridge devices.  Don't allow
 112     * hot-unplug of bridge devices unless they were added by hotplug
 113     * (and so, not described by acpi).
 114     */
 115    return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
 116}
 117
 118static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
 119{
 120    BusChild *kid, *next;
 121    int slot = ctz32(slots);
 122    PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
 123
 124    if (!bus) {
 125        return;
 126    }
 127
 128    /* Mark request as complete */
 129    s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
 130    s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
 131
 132    QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
 133        DeviceState *qdev = kid->child;
 134        PCIDevice *dev = PCI_DEVICE(qdev);
 135        if (PCI_SLOT(dev->devfn) == slot) {
 136            if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
 137                object_unparent(OBJECT(qdev));
 138            }
 139        }
 140    }
 141}
 142
 143static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
 144{
 145    BusChild *kid, *next;
 146    PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
 147
 148    /* Execute any pending removes during reset */
 149    while (s->acpi_pcihp_pci_status[bsel].down) {
 150        acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
 151    }
 152
 153    s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
 154
 155    if (!bus) {
 156        return;
 157    }
 158    QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
 159        DeviceState *qdev = kid->child;
 160        PCIDevice *pdev = PCI_DEVICE(qdev);
 161        int slot = PCI_SLOT(pdev->devfn);
 162
 163        if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
 164            s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
 165        }
 166    }
 167}
 168
 169static void acpi_pcihp_update(AcpiPciHpState *s)
 170{
 171    int i;
 172
 173    for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
 174        acpi_pcihp_update_hotplug_bus(s, i);
 175    }
 176}
 177
 178void acpi_pcihp_reset(AcpiPciHpState *s)
 179{
 180    acpi_pcihp_update(s);
 181}
 182
 183void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
 184                               DeviceState *dev, Error **errp)
 185{
 186    PCIDevice *pdev = PCI_DEVICE(dev);
 187    int slot = PCI_SLOT(pdev->devfn);
 188    int bsel = acpi_pcihp_get_bsel(pdev->bus);
 189    if (bsel < 0) {
 190        error_setg(errp, "Unsupported bus. Bus doesn't have property '"
 191                   ACPI_PCIHP_PROP_BSEL "' set");
 192        return;
 193    }
 194
 195    /* Don't send event when device is enabled during qemu machine creation:
 196     * it is present on boot, no hotplug event is necessary. We do send an
 197     * event when the device is disabled later. */
 198    if (!dev->hotplugged) {
 199        return;
 200    }
 201
 202    s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
 203    acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
 204}
 205
 206void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
 207                                 DeviceState *dev, Error **errp)
 208{
 209    PCIDevice *pdev = PCI_DEVICE(dev);
 210    int slot = PCI_SLOT(pdev->devfn);
 211    int bsel = acpi_pcihp_get_bsel(pdev->bus);
 212    if (bsel < 0) {
 213        error_setg(errp, "Unsupported bus. Bus doesn't have property '"
 214                   ACPI_PCIHP_PROP_BSEL "' set");
 215        return;
 216    }
 217
 218    s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
 219    acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
 220}
 221
 222static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
 223{
 224    AcpiPciHpState *s = opaque;
 225    uint32_t val = 0;
 226    int bsel = s->hotplug_select;
 227
 228    if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
 229        return 0;
 230    }
 231
 232    switch (addr) {
 233    case PCI_UP_BASE:
 234        val = s->acpi_pcihp_pci_status[bsel].up;
 235        if (!s->legacy_piix) {
 236            s->acpi_pcihp_pci_status[bsel].up = 0;
 237        }
 238        ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
 239        break;
 240    case PCI_DOWN_BASE:
 241        val = s->acpi_pcihp_pci_status[bsel].down;
 242        ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
 243        break;
 244    case PCI_EJ_BASE:
 245        /* No feature defined yet */
 246        ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
 247        break;
 248    case PCI_RMV_BASE:
 249        val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
 250        ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
 251        break;
 252    case PCI_SEL_BASE:
 253        val = s->hotplug_select;
 254        ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
 255    default:
 256        break;
 257    }
 258
 259    return val;
 260}
 261
 262static void pci_write(void *opaque, hwaddr addr, uint64_t data,
 263                      unsigned int size)
 264{
 265    AcpiPciHpState *s = opaque;
 266    switch (addr) {
 267    case PCI_EJ_BASE:
 268        if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
 269            break;
 270        }
 271        acpi_pcihp_eject_slot(s, s->hotplug_select, data);
 272        ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
 273                      addr, data);
 274        break;
 275    case PCI_SEL_BASE:
 276        s->hotplug_select = data;
 277        ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
 278                      addr, data);
 279    default:
 280        break;
 281    }
 282}
 283
 284static const MemoryRegionOps acpi_pcihp_io_ops = {
 285    .read = pci_read,
 286    .write = pci_write,
 287    .endianness = DEVICE_LITTLE_ENDIAN,
 288    .valid = {
 289        .min_access_size = 4,
 290        .max_access_size = 4,
 291    },
 292};
 293
 294void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
 295                     MemoryRegion *address_space_io, bool bridges_enabled)
 296{
 297    s->io_len = ACPI_PCIHP_SIZE;
 298    s->io_base = ACPI_PCIHP_ADDR;
 299
 300    s->root= root_bus;
 301    s->legacy_piix = !bridges_enabled;
 302
 303    memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
 304                          "acpi-pci-hotplug", s->io_len);
 305    memory_region_add_subregion(address_space_io, s->io_base, &s->io);
 306
 307    object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
 308                                   &error_abort);
 309    object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
 310                                   &error_abort);
 311}
 312
 313const VMStateDescription vmstate_acpi_pcihp_pci_status = {
 314    .name = "acpi_pcihp_pci_status",
 315    .version_id = 1,
 316    .minimum_version_id = 1,
 317    .fields = (VMStateField[]) {
 318        VMSTATE_UINT32(up, AcpiPciHpPciStatus),
 319        VMSTATE_UINT32(down, AcpiPciHpPciStatus),
 320        VMSTATE_END_OF_LIST()
 321    }
 322};
 323