LXR qemu/hw/display/vga-isa-mm.c

   1/*
   2 * QEMU ISA MM VGA Emulator.
   3 *
   4 * Copyright (c) 2003 Fabrice Bellard
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24#include "qemu/osdep.h"
  25#include "hw/hw.h"
  26#include "ui/console.h"
  27#include "hw/i386/pc.h"
  28#include "vga_int.h"
  29#include "ui/pixel_ops.h"
  30#include "qemu/timer.h"
  31
  32#define VGA_RAM_SIZE (8192 * 1024)
  33
  34typedef struct ISAVGAMMState {
  35    VGACommonState vga;
  36    int it_shift;
  37} ISAVGAMMState;
  38
  39/* Memory mapped interface */
  40static uint32_t vga_mm_readb (void *opaque, hwaddr addr)
  41{
  42    ISAVGAMMState *s = opaque;
  43
  44    return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff;
  45}
  46
  47static void vga_mm_writeb (void *opaque,
  48                           hwaddr addr, uint32_t value)
  49{
  50    ISAVGAMMState *s = opaque;
  51
  52    vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff);
  53}
  54
  55static uint32_t vga_mm_readw (void *opaque, hwaddr addr)
  56{
  57    ISAVGAMMState *s = opaque;
  58
  59    return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff;
  60}
  61
  62static void vga_mm_writew (void *opaque,
  63                           hwaddr addr, uint32_t value)
  64{
  65    ISAVGAMMState *s = opaque;
  66
  67    vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff);
  68}
  69
  70static uint32_t vga_mm_readl (void *opaque, hwaddr addr)
  71{
  72    ISAVGAMMState *s = opaque;
  73
  74    return vga_ioport_read(&s->vga, addr >> s->it_shift);
  75}
  76
  77static void vga_mm_writel (void *opaque,
  78                           hwaddr addr, uint32_t value)
  79{
  80    ISAVGAMMState *s = opaque;
  81
  82    vga_ioport_write(&s->vga, addr >> s->it_shift, value);
  83}
  84
  85static const MemoryRegionOps vga_mm_ctrl_ops = {
  86    .old_mmio = {
  87        .read = {
  88            vga_mm_readb,
  89            vga_mm_readw,
  90            vga_mm_readl,
  91        },
  92        .write = {
  93            vga_mm_writeb,
  94            vga_mm_writew,
  95            vga_mm_writel,
  96        },
  97    },
  98    .endianness = DEVICE_NATIVE_ENDIAN,
  99};
 100
 101static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base,
 102                        hwaddr ctrl_base, int it_shift,
 103                        MemoryRegion *address_space)
 104{
 105    MemoryRegion *s_ioport_ctrl, *vga_io_memory;
 106
 107    s->it_shift = it_shift;
 108    s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl));
 109    memory_region_init_io(s_ioport_ctrl, NULL, &vga_mm_ctrl_ops, s,
 110                          "vga-mm-ctrl", 0x100000);
 111    memory_region_set_flush_coalesced(s_ioport_ctrl);
 112
 113    vga_io_memory = g_malloc(sizeof(*vga_io_memory));
 114    /* XXX: endianness? */
 115    memory_region_init_io(vga_io_memory, NULL, &vga_mem_ops, &s->vga,
 116                          "vga-mem", 0x20000);
 117
 118    vmstate_register(NULL, 0, &vmstate_vga_common, s);
 119
 120    memory_region_add_subregion(address_space, ctrl_base, s_ioport_ctrl);
 121    s->vga.bank_offset = 0;
 122    memory_region_add_subregion(address_space,
 123                                vram_base + 0x000a0000, vga_io_memory);
 124    memory_region_set_coalescing(vga_io_memory);
 125}
 126
 127int isa_vga_mm_init(hwaddr vram_base,
 128                    hwaddr ctrl_base, int it_shift,
 129                    MemoryRegion *address_space)
 130{
 131    ISAVGAMMState *s;
 132
 133    s = g_malloc0(sizeof(*s));
 134
 135    s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
 136    vga_common_init(&s->vga, NULL, true);
 137    vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
 138
 139    s->vga.con = graphic_console_init(NULL, 0, s->vga.hw_ops, s);
 140
 141    vga_init_vbe(&s->vga, NULL, address_space);
 142    return 0;
 143}
 144