qemu/target/sparc/fop_helper.c
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   1/*
   2 * FPU op helpers
   3 *
   4 *  Copyright (c) 2003-2005 Fabrice Bellard
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "exec/exec-all.h"
  23#include "exec/helper-proto.h"
  24
  25#define QT0 (env->qt0)
  26#define QT1 (env->qt1)
  27
  28static target_ulong do_check_ieee_exceptions(CPUSPARCState *env, uintptr_t ra)
  29{
  30    target_ulong status = get_float_exception_flags(&env->fp_status);
  31    target_ulong fsr = env->fsr;
  32
  33    if (unlikely(status)) {
  34        /* Keep exception flags clear for next time.  */
  35        set_float_exception_flags(0, &env->fp_status);
  36
  37        /* Copy IEEE 754 flags into FSR */
  38        if (status & float_flag_invalid) {
  39            fsr |= FSR_NVC;
  40        }
  41        if (status & float_flag_overflow) {
  42            fsr |= FSR_OFC;
  43        }
  44        if (status & float_flag_underflow) {
  45            fsr |= FSR_UFC;
  46        }
  47        if (status & float_flag_divbyzero) {
  48            fsr |= FSR_DZC;
  49        }
  50        if (status & float_flag_inexact) {
  51            fsr |= FSR_NXC;
  52        }
  53
  54        if ((fsr & FSR_CEXC_MASK) & ((fsr & FSR_TEM_MASK) >> 23)) {
  55            CPUState *cs = CPU(sparc_env_get_cpu(env));
  56
  57            /* Unmasked exception, generate a trap.  Note that while
  58               the helper is marked as NO_WG, we can get away with
  59               writing to cpu state along the exception path, since
  60               TCG generated code will never see the write.  */
  61            env->fsr = fsr | FSR_FTT_IEEE_EXCP;
  62            cs->exception_index = TT_FP_EXCP;
  63            cpu_loop_exit_restore(cs, ra);
  64        } else {
  65            /* Accumulate exceptions */
  66            fsr |= (fsr & FSR_CEXC_MASK) << 5;
  67        }
  68    }
  69
  70    return fsr;
  71}
  72
  73target_ulong helper_check_ieee_exceptions(CPUSPARCState *env)
  74{
  75    return do_check_ieee_exceptions(env, GETPC());
  76}
  77
  78#define F_HELPER(name, p) void helper_f##name##p(CPUSPARCState *env)
  79
  80#define F_BINOP(name)                                           \
  81    float32 helper_f ## name ## s (CPUSPARCState *env, float32 src1, \
  82                                   float32 src2)                \
  83    {                                                           \
  84        return float32_ ## name (src1, src2, &env->fp_status);  \
  85    }                                                           \
  86    float64 helper_f ## name ## d (CPUSPARCState * env, float64 src1,\
  87                                   float64 src2)                \
  88    {                                                           \
  89        return float64_ ## name (src1, src2, &env->fp_status);  \
  90    }                                                           \
  91    F_HELPER(name, q)                                           \
  92    {                                                           \
  93        QT0 = float128_ ## name (QT0, QT1, &env->fp_status);    \
  94    }
  95
  96F_BINOP(add);
  97F_BINOP(sub);
  98F_BINOP(mul);
  99F_BINOP(div);
 100#undef F_BINOP
 101
 102float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2)
 103{
 104    return float64_mul(float32_to_float64(src1, &env->fp_status),
 105                       float32_to_float64(src2, &env->fp_status),
 106                       &env->fp_status);
 107}
 108
 109void helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2)
 110{
 111    QT0 = float128_mul(float64_to_float128(src1, &env->fp_status),
 112                       float64_to_float128(src2, &env->fp_status),
 113                       &env->fp_status);
 114}
 115
 116float32 helper_fnegs(float32 src)
 117{
 118    return float32_chs(src);
 119}
 120
 121#ifdef TARGET_SPARC64
 122float64 helper_fnegd(float64 src)
 123{
 124    return float64_chs(src);
 125}
 126
 127F_HELPER(neg, q)
 128{
 129    QT0 = float128_chs(QT1);
 130}
 131#endif
 132
 133/* Integer to float conversion.  */
 134float32 helper_fitos(CPUSPARCState *env, int32_t src)
 135{
 136    return int32_to_float32(src, &env->fp_status);
 137}
 138
 139float64 helper_fitod(CPUSPARCState *env, int32_t src)
 140{
 141    return int32_to_float64(src, &env->fp_status);
 142}
 143
 144void helper_fitoq(CPUSPARCState *env, int32_t src)
 145{
 146    QT0 = int32_to_float128(src, &env->fp_status);
 147}
 148
 149#ifdef TARGET_SPARC64
 150float32 helper_fxtos(CPUSPARCState *env, int64_t src)
 151{
 152    return int64_to_float32(src, &env->fp_status);
 153}
 154
 155float64 helper_fxtod(CPUSPARCState *env, int64_t src)
 156{
 157    return int64_to_float64(src, &env->fp_status);
 158}
 159
 160void helper_fxtoq(CPUSPARCState *env, int64_t src)
 161{
 162    QT0 = int64_to_float128(src, &env->fp_status);
 163}
 164#endif
 165#undef F_HELPER
 166
 167/* floating point conversion */
 168float32 helper_fdtos(CPUSPARCState *env, float64 src)
 169{
 170    return float64_to_float32(src, &env->fp_status);
 171}
 172
 173float64 helper_fstod(CPUSPARCState *env, float32 src)
 174{
 175    return float32_to_float64(src, &env->fp_status);
 176}
 177
 178float32 helper_fqtos(CPUSPARCState *env)
 179{
 180    return float128_to_float32(QT1, &env->fp_status);
 181}
 182
 183void helper_fstoq(CPUSPARCState *env, float32 src)
 184{
 185    QT0 = float32_to_float128(src, &env->fp_status);
 186}
 187
 188float64 helper_fqtod(CPUSPARCState *env)
 189{
 190    return float128_to_float64(QT1, &env->fp_status);
 191}
 192
 193void helper_fdtoq(CPUSPARCState *env, float64 src)
 194{
 195    QT0 = float64_to_float128(src, &env->fp_status);
 196}
 197
 198/* Float to integer conversion.  */
 199int32_t helper_fstoi(CPUSPARCState *env, float32 src)
 200{
 201    return float32_to_int32_round_to_zero(src, &env->fp_status);
 202}
 203
 204int32_t helper_fdtoi(CPUSPARCState *env, float64 src)
 205{
 206    return float64_to_int32_round_to_zero(src, &env->fp_status);
 207}
 208
 209int32_t helper_fqtoi(CPUSPARCState *env)
 210{
 211    return float128_to_int32_round_to_zero(QT1, &env->fp_status);
 212}
 213
 214#ifdef TARGET_SPARC64
 215int64_t helper_fstox(CPUSPARCState *env, float32 src)
 216{
 217    return float32_to_int64_round_to_zero(src, &env->fp_status);
 218}
 219
 220int64_t helper_fdtox(CPUSPARCState *env, float64 src)
 221{
 222    return float64_to_int64_round_to_zero(src, &env->fp_status);
 223}
 224
 225int64_t helper_fqtox(CPUSPARCState *env)
 226{
 227    return float128_to_int64_round_to_zero(QT1, &env->fp_status);
 228}
 229#endif
 230
 231float32 helper_fabss(float32 src)
 232{
 233    return float32_abs(src);
 234}
 235
 236#ifdef TARGET_SPARC64
 237float64 helper_fabsd(float64 src)
 238{
 239    return float64_abs(src);
 240}
 241
 242void helper_fabsq(CPUSPARCState *env)
 243{
 244    QT0 = float128_abs(QT1);
 245}
 246#endif
 247
 248float32 helper_fsqrts(CPUSPARCState *env, float32 src)
 249{
 250    return float32_sqrt(src, &env->fp_status);
 251}
 252
 253float64 helper_fsqrtd(CPUSPARCState *env, float64 src)
 254{
 255    return float64_sqrt(src, &env->fp_status);
 256}
 257
 258void helper_fsqrtq(CPUSPARCState *env)
 259{
 260    QT0 = float128_sqrt(QT1, &env->fp_status);
 261}
 262
 263#define GEN_FCMP(name, size, reg1, reg2, FS, E)                         \
 264    target_ulong glue(helper_, name) (CPUSPARCState *env)               \
 265    {                                                                   \
 266        int ret;                                                        \
 267        target_ulong fsr;                                               \
 268        if (E) {                                                        \
 269            ret = glue(size, _compare)(reg1, reg2, &env->fp_status);    \
 270        } else {                                                        \
 271            ret = glue(size, _compare_quiet)(reg1, reg2,                \
 272                                             &env->fp_status);          \
 273        }                                                               \
 274        fsr = do_check_ieee_exceptions(env, GETPC());                   \
 275        switch (ret) {                                                  \
 276        case float_relation_unordered:                                  \
 277            fsr |= (FSR_FCC1 | FSR_FCC0) << FS;                         \
 278            fsr |= FSR_NVA;                                             \
 279            break;                                                      \
 280        case float_relation_less:                                       \
 281            fsr &= ~(FSR_FCC1) << FS;                                   \
 282            fsr |= FSR_FCC0 << FS;                                      \
 283            break;                                                      \
 284        case float_relation_greater:                                    \
 285            fsr &= ~(FSR_FCC0) << FS;                                   \
 286            fsr |= FSR_FCC1 << FS;                                      \
 287            break;                                                      \
 288        default:                                                        \
 289            fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                      \
 290            break;                                                      \
 291        }                                                               \
 292        return fsr;                                                     \
 293    }
 294#define GEN_FCMP_T(name, size, FS, E)                                   \
 295    target_ulong glue(helper_, name)(CPUSPARCState *env, size src1, size src2)\
 296    {                                                                   \
 297        int ret;                                                        \
 298        target_ulong fsr;                                               \
 299        if (E) {                                                        \
 300            ret = glue(size, _compare)(src1, src2, &env->fp_status);    \
 301        } else {                                                        \
 302            ret = glue(size, _compare_quiet)(src1, src2,                \
 303                                             &env->fp_status);          \
 304        }                                                               \
 305        fsr = do_check_ieee_exceptions(env, GETPC());                   \
 306        switch (ret) {                                                  \
 307        case float_relation_unordered:                                  \
 308            fsr |= (FSR_FCC1 | FSR_FCC0) << FS;                         \
 309            break;                                                      \
 310        case float_relation_less:                                       \
 311            fsr &= ~(FSR_FCC1 << FS);                                   \
 312            fsr |= FSR_FCC0 << FS;                                      \
 313            break;                                                      \
 314        case float_relation_greater:                                    \
 315            fsr &= ~(FSR_FCC0 << FS);                                   \
 316            fsr |= FSR_FCC1 << FS;                                      \
 317            break;                                                      \
 318        default:                                                        \
 319            fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                      \
 320            break;                                                      \
 321        }                                                               \
 322        return fsr;                                                     \
 323    }
 324
 325GEN_FCMP_T(fcmps, float32, 0, 0);
 326GEN_FCMP_T(fcmpd, float64, 0, 0);
 327
 328GEN_FCMP_T(fcmpes, float32, 0, 1);
 329GEN_FCMP_T(fcmped, float64, 0, 1);
 330
 331GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0);
 332GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1);
 333
 334#ifdef TARGET_SPARC64
 335GEN_FCMP_T(fcmps_fcc1, float32, 22, 0);
 336GEN_FCMP_T(fcmpd_fcc1, float64, 22, 0);
 337GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0);
 338
 339GEN_FCMP_T(fcmps_fcc2, float32, 24, 0);
 340GEN_FCMP_T(fcmpd_fcc2, float64, 24, 0);
 341GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0);
 342
 343GEN_FCMP_T(fcmps_fcc3, float32, 26, 0);
 344GEN_FCMP_T(fcmpd_fcc3, float64, 26, 0);
 345GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0);
 346
 347GEN_FCMP_T(fcmpes_fcc1, float32, 22, 1);
 348GEN_FCMP_T(fcmped_fcc1, float64, 22, 1);
 349GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1);
 350
 351GEN_FCMP_T(fcmpes_fcc2, float32, 24, 1);
 352GEN_FCMP_T(fcmped_fcc2, float64, 24, 1);
 353GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1);
 354
 355GEN_FCMP_T(fcmpes_fcc3, float32, 26, 1);
 356GEN_FCMP_T(fcmped_fcc3, float64, 26, 1);
 357GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
 358#endif
 359#undef GEN_FCMP_T
 360#undef GEN_FCMP
 361
 362static void set_fsr(CPUSPARCState *env, target_ulong fsr)
 363{
 364    int rnd_mode;
 365
 366    switch (fsr & FSR_RD_MASK) {
 367    case FSR_RD_NEAREST:
 368        rnd_mode = float_round_nearest_even;
 369        break;
 370    default:
 371    case FSR_RD_ZERO:
 372        rnd_mode = float_round_to_zero;
 373        break;
 374    case FSR_RD_POS:
 375        rnd_mode = float_round_up;
 376        break;
 377    case FSR_RD_NEG:
 378        rnd_mode = float_round_down;
 379        break;
 380    }
 381    set_float_rounding_mode(rnd_mode, &env->fp_status);
 382}
 383
 384target_ulong helper_ldfsr(CPUSPARCState *env, target_ulong old_fsr,
 385                          uint32_t new_fsr)
 386{
 387    old_fsr = (new_fsr & FSR_LDFSR_MASK) | (old_fsr & FSR_LDFSR_OLDMASK);
 388    set_fsr(env, old_fsr);
 389    return old_fsr;
 390}
 391
 392#ifdef TARGET_SPARC64
 393target_ulong helper_ldxfsr(CPUSPARCState *env, target_ulong old_fsr,
 394                           uint64_t new_fsr)
 395{
 396    old_fsr = (new_fsr & FSR_LDXFSR_MASK) | (old_fsr & FSR_LDXFSR_OLDMASK);
 397    set_fsr(env, old_fsr);
 398    return old_fsr;
 399}
 400#endif
 401