LXR qemu/tests/tcg/xtensa/test

   1#include "macros.inc"
   2
   3.purgem test
   4.macro test name
   5    movi    a2, 1f
   6    movi    a3, 99f
   70:
   8    ipf     a2, 0
   9    ipf     a2, 4
  10    ipf     a2, 8
  11    ipf     a2, 12
  12    addi    a2, a2, 16
  13    blt     a2, a3, 0b
  14    j       1f
  15    .align 4
  161:
  17.endm
  18
  19test_suite pipeline
  20
  21test register_no_stall
  22    rsr     a3, ccount
  23    add     a5, a6, a6
  24    add     a6, a5, a5
  25    rsr     a4, ccount
  26    sub     a3, a4, a3
  27    assert  eqi, a3, 3
  28test_end
  29
  30test register_stall
  31    l32i    a5, a1, 0   /* data cache preload */
  32    nop
  33    rsr     a3, ccount
  34    l32i    a5, a1, 0
  35    add     a6, a5, a5  /* M-to-E interlock */
  36    rsr     a4, ccount
  37    sub     a3, a4, a3
  38    assert  eqi, a3, 4
  39test_end
  40
  41test j0_stall
  42    rsr     a3, ccount
  43    j       1f          /* E + 2-cycle penalty */
  441:
  45    rsr     a4, ccount  /* E */
  46    sub     a3, a4, a3
  47    assert  eqi, a3, 4
  48test_end
  49
  50test j1_stall
  51    rsr     a3, ccount
  52    j       1f
  53    nop
  541:
  55    rsr     a4, ccount
  56    sub     a3, a4, a3
  57    assert  eqi, a3, 4
  58test_end
  59
  60test j5_stall
  61    rsr     a3, ccount
  62    j       1f
  63    nop
  64    nop
  65    nop
  66    nop
  67    nop
  681:
  69    rsr     a4, ccount
  70    sub     a3, a4, a3
  71    assert  eqi, a3, 4
  72test_end
  73
  74test b_no_stall
  75    movi    a5, 1
  76    rsr     a3, ccount
  77    beqi    a5, 2, 1f
  78    rsr     a4, ccount
  79    sub     a3, a4, a3
  80    assert  eqi, a3, 2
  811:
  82test_end
  83
  84test b1_stall
  85    movi    a5, 1
  86    rsr     a3, ccount
  87    beqi    a5, 1, 1f
  88    nop
  891:
  90    rsr     a4, ccount
  91    sub     a3, a4, a3
  92    assert  eqi, a3, 4
  93test_end
  94
  95test b5_stall
  96    movi    a5, 1
  97    rsr     a3, ccount
  98    beqi    a5, 1, 1f
  99    nop
 100    nop
 101    nop
 102    nop
 103    nop
 1041:
 105    rsr     a4, ccount
 106    sub     a3, a4, a3
 107    assert  eqi, a3, 4
 108test_end
 109
 110/* PS *SYNC */
 111
 112test ps_dsync
 113    rsr     a5, ps
 114    isync
 115    rsr     a3, ccount
 116    wsr     a5, ps
 117    dsync
 118    rsr     a4, ccount
 119    sub     a3, a4, a3
 120    assert  eqi, a3, 5
 121test_end
 122
 123test ps_esync
 124    rsr     a5, ps
 125    isync
 126    rsr     a3, ccount
 127    wsr     a5, ps
 128    esync
 129    rsr     a4, ccount
 130    sub     a3, a4, a3
 131    assert  eqi, a3, 5
 132test_end
 133
 134test ps_rsync
 135    rsr     a5, ps
 136    isync
 137    rsr     a3, ccount
 138    wsr     a5, ps
 139    rsync
 140    rsr     a4, ccount
 141    sub     a3, a4, a3
 142    assert  eqi, a3, 5
 143test_end
 144
 145test ps_isync
 146    rsr     a5, ps
 147    isync
 148    rsr     a3, ccount
 149    wsr     a5, ps
 150    isync
 151    rsr     a4, ccount
 152    sub     a3, a4, a3
 153    movi    a4, 9
 154    assert  eq, a3, a4
 155test_end
 156
 157test_suite_end
 158