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19#include "qemu/osdep.h"
20#include "cpu.h"
21#include "trace.h"
22#include "disas/disas.h"
23#include "exec/exec-all.h"
24#include "tcg.h"
25#include "qemu/atomic.h"
26#include "sysemu/qtest.h"
27#include "qemu/timer.h"
28#include "exec/address-spaces.h"
29#include "qemu/rcu.h"
30#include "exec/tb-hash.h"
31#include "exec/log.h"
32#include "qemu/main-loop.h"
33#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
34#include "hw/i386/apic.h"
35#endif
36#include "sysemu/cpus.h"
37#include "sysemu/replay.h"
38
39
40
41typedef struct SyncClocks {
42 int64_t diff_clk;
43 int64_t last_cpu_icount;
44 int64_t realtime_clock;
45} SyncClocks;
46
47#if !defined(CONFIG_USER_ONLY)
48
49
50
51
52#define VM_CLOCK_ADVANCE 3000000
53#define THRESHOLD_REDUCE 1.5
54#define MAX_DELAY_PRINT_RATE 2000000000LL
55#define MAX_NB_PRINTS 100
56
57static void align_clocks(SyncClocks *sc, const CPUState *cpu)
58{
59 int64_t cpu_icount;
60
61 if (!icount_align_option) {
62 return;
63 }
64
65 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
66 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
67 sc->last_cpu_icount = cpu_icount;
68
69 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
70#ifndef _WIN32
71 struct timespec sleep_delay, rem_delay;
72 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
73 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
74 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
75 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
76 } else {
77 sc->diff_clk = 0;
78 }
79#else
80 Sleep(sc->diff_clk / SCALE_MS);
81 sc->diff_clk = 0;
82#endif
83 }
84}
85
86static void print_delay(const SyncClocks *sc)
87{
88 static float threshold_delay;
89 static int64_t last_realtime_clock;
90 static int nb_prints;
91
92 if (icount_align_option &&
93 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
94 nb_prints < MAX_NB_PRINTS) {
95 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
96 (-sc->diff_clk / (float)1000000000LL <
97 (threshold_delay - THRESHOLD_REDUCE))) {
98 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
99 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
100 threshold_delay - 1,
101 threshold_delay);
102 nb_prints++;
103 last_realtime_clock = sc->realtime_clock;
104 }
105 }
106}
107
108static void init_delay_params(SyncClocks *sc,
109 const CPUState *cpu)
110{
111 if (!icount_align_option) {
112 return;
113 }
114 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
115 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
116 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
117 if (sc->diff_clk < max_delay) {
118 max_delay = sc->diff_clk;
119 }
120 if (sc->diff_clk > max_advance) {
121 max_advance = sc->diff_clk;
122 }
123
124
125
126 print_delay(sc);
127}
128#else
129static void align_clocks(SyncClocks *sc, const CPUState *cpu)
130{
131}
132
133static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
134{
135}
136#endif
137
138
139static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
140{
141 CPUArchState *env = cpu->env_ptr;
142 uintptr_t ret;
143 TranslationBlock *last_tb;
144 int tb_exit;
145 uint8_t *tb_ptr = itb->tc_ptr;
146
147 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
148 "Trace %p [%d: " TARGET_FMT_lx "] %s\n",
149 itb->tc_ptr, cpu->cpu_index, itb->pc,
150 lookup_symbol(itb->pc));
151
152#if defined(DEBUG_DISAS)
153 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
154 && qemu_log_in_addr_range(itb->pc)) {
155 qemu_log_lock();
156#if defined(TARGET_I386)
157 log_cpu_state(cpu, CPU_DUMP_CCOP);
158#else
159 log_cpu_state(cpu, 0);
160#endif
161 qemu_log_unlock();
162 }
163#endif
164
165 cpu->can_do_io = !use_icount;
166 ret = tcg_qemu_tb_exec(env, tb_ptr);
167 cpu->can_do_io = 1;
168 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
169 tb_exit = ret & TB_EXIT_MASK;
170 trace_exec_tb_exit(last_tb, tb_exit);
171
172 if (tb_exit > TB_EXIT_IDX1) {
173
174
175
176
177 CPUClass *cc = CPU_GET_CLASS(cpu);
178 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
179 "Stopped execution of TB chain before %p ["
180 TARGET_FMT_lx "] %s\n",
181 last_tb->tc_ptr, last_tb->pc,
182 lookup_symbol(last_tb->pc));
183 if (cc->synchronize_from_tb) {
184 cc->synchronize_from_tb(cpu, last_tb);
185 } else {
186 assert(cc->set_pc);
187 cc->set_pc(cpu, last_tb->pc);
188 }
189 }
190 return ret;
191}
192
193#ifndef CONFIG_USER_ONLY
194
195
196static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
197 TranslationBlock *orig_tb, bool ignore_icount)
198{
199 TranslationBlock *tb;
200
201
202
203 if (max_cycles > CF_COUNT_MASK)
204 max_cycles = CF_COUNT_MASK;
205
206 tb_lock();
207 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
208 max_cycles | CF_NOCACHE
209 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
210 tb->orig_tb = orig_tb;
211 tb_unlock();
212
213
214 trace_exec_tb_nocache(tb, tb->pc);
215 cpu_tb_exec(cpu, tb);
216
217 tb_lock();
218 tb_phys_invalidate(tb, -1);
219 tb_free(tb);
220 tb_unlock();
221}
222#endif
223
224static void cpu_exec_step(CPUState *cpu)
225{
226 CPUClass *cc = CPU_GET_CLASS(cpu);
227 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
228 TranslationBlock *tb;
229 target_ulong cs_base, pc;
230 uint32_t flags;
231
232 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
233 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
234 mmap_lock();
235 tb_lock();
236 tb = tb_gen_code(cpu, pc, cs_base, flags,
237 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
238 tb->orig_tb = NULL;
239 tb_unlock();
240 mmap_unlock();
241
242 cc->cpu_exec_enter(cpu);
243
244 trace_exec_tb_nocache(tb, pc);
245 cpu_tb_exec(cpu, tb);
246 cc->cpu_exec_exit(cpu);
247
248 tb_lock();
249 tb_phys_invalidate(tb, -1);
250 tb_free(tb);
251 tb_unlock();
252 } else {
253
254
255
256
257
258#ifndef CONFIG_SOFTMMU
259 tcg_debug_assert(!have_mmap_lock());
260#endif
261 tb_lock_reset();
262 }
263}
264
265void cpu_exec_step_atomic(CPUState *cpu)
266{
267 start_exclusive();
268
269
270 parallel_cpus = false;
271 cpu_exec_step(cpu);
272 parallel_cpus = true;
273
274 end_exclusive();
275}
276
277struct tb_desc {
278 target_ulong pc;
279 target_ulong cs_base;
280 CPUArchState *env;
281 tb_page_addr_t phys_page1;
282 uint32_t flags;
283 uint32_t trace_vcpu_dstate;
284};
285
286static bool tb_cmp(const void *p, const void *d)
287{
288 const TranslationBlock *tb = p;
289 const struct tb_desc *desc = d;
290
291 if (tb->pc == desc->pc &&
292 tb->page_addr[0] == desc->phys_page1 &&
293 tb->cs_base == desc->cs_base &&
294 tb->flags == desc->flags &&
295 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
296 !atomic_read(&tb->invalid)) {
297
298 if (tb->page_addr[1] == -1) {
299 return true;
300 } else {
301 tb_page_addr_t phys_page2;
302 target_ulong virt_page2;
303
304 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
305 phys_page2 = get_page_addr_code(desc->env, virt_page2);
306 if (tb->page_addr[1] == phys_page2) {
307 return true;
308 }
309 }
310 }
311 return false;
312}
313
314TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
315 target_ulong cs_base, uint32_t flags)
316{
317 tb_page_addr_t phys_pc;
318 struct tb_desc desc;
319 uint32_t h;
320
321 desc.env = (CPUArchState *)cpu->env_ptr;
322 desc.cs_base = cs_base;
323 desc.flags = flags;
324 desc.trace_vcpu_dstate = *cpu->trace_dstate;
325 desc.pc = pc;
326 phys_pc = get_page_addr_code(desc.env, pc);
327 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
328 h = tb_hash_func(phys_pc, pc, flags, *cpu->trace_dstate);
329 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
330}
331
332static inline TranslationBlock *tb_find(CPUState *cpu,
333 TranslationBlock *last_tb,
334 int tb_exit)
335{
336 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
337 TranslationBlock *tb;
338 target_ulong cs_base, pc;
339 uint32_t flags;
340 bool have_tb_lock = false;
341
342
343
344
345 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
346 tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
347 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
348 tb->flags != flags ||
349 tb->trace_vcpu_dstate != *cpu->trace_dstate)) {
350 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
351 if (!tb) {
352
353
354
355
356
357 mmap_lock();
358 tb_lock();
359 have_tb_lock = true;
360
361
362
363
364 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
365 if (!tb) {
366
367 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
368 }
369
370 mmap_unlock();
371 }
372
373
374 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
375 }
376#ifndef CONFIG_USER_ONLY
377
378
379
380
381 if (tb->page_addr[1] != -1) {
382 last_tb = NULL;
383 }
384#endif
385
386 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
387 if (!have_tb_lock) {
388 tb_lock();
389 have_tb_lock = true;
390 }
391 if (!tb->invalid) {
392 tb_add_jump(last_tb, tb_exit, tb);
393 }
394 }
395 if (have_tb_lock) {
396 tb_unlock();
397 }
398 return tb;
399}
400
401static inline bool cpu_handle_halt(CPUState *cpu)
402{
403 if (cpu->halted) {
404#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
405 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
406 && replay_interrupt()) {
407 X86CPU *x86_cpu = X86_CPU(cpu);
408 qemu_mutex_lock_iothread();
409 apic_poll_irq(x86_cpu->apic_state);
410 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
411 qemu_mutex_unlock_iothread();
412 }
413#endif
414 if (!cpu_has_work(cpu)) {
415 return true;
416 }
417
418 cpu->halted = 0;
419 }
420
421 return false;
422}
423
424static inline void cpu_handle_debug_exception(CPUState *cpu)
425{
426 CPUClass *cc = CPU_GET_CLASS(cpu);
427 CPUWatchpoint *wp;
428
429 if (!cpu->watchpoint_hit) {
430 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
431 wp->flags &= ~BP_WATCHPOINT_HIT;
432 }
433 }
434
435 cc->debug_excp_handler(cpu);
436}
437
438static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
439{
440 if (cpu->exception_index >= 0) {
441 if (cpu->exception_index >= EXCP_INTERRUPT) {
442
443 *ret = cpu->exception_index;
444 if (*ret == EXCP_DEBUG) {
445 cpu_handle_debug_exception(cpu);
446 }
447 cpu->exception_index = -1;
448 return true;
449 } else {
450#if defined(CONFIG_USER_ONLY)
451
452
453
454#if defined(TARGET_I386)
455 CPUClass *cc = CPU_GET_CLASS(cpu);
456 cc->do_interrupt(cpu);
457#endif
458 *ret = cpu->exception_index;
459 cpu->exception_index = -1;
460 return true;
461#else
462 if (replay_exception()) {
463 CPUClass *cc = CPU_GET_CLASS(cpu);
464 qemu_mutex_lock_iothread();
465 cc->do_interrupt(cpu);
466 qemu_mutex_unlock_iothread();
467 cpu->exception_index = -1;
468 } else if (!replay_has_interrupt()) {
469
470 *ret = EXCP_INTERRUPT;
471 return true;
472 }
473#endif
474 }
475#ifndef CONFIG_USER_ONLY
476 } else if (replay_has_exception()
477 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
478
479 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
480 *ret = -1;
481 return true;
482#endif
483 }
484
485 return false;
486}
487
488static inline bool cpu_handle_interrupt(CPUState *cpu,
489 TranslationBlock **last_tb)
490{
491 CPUClass *cc = CPU_GET_CLASS(cpu);
492
493 if (unlikely(atomic_read(&cpu->interrupt_request))) {
494 int interrupt_request;
495 qemu_mutex_lock_iothread();
496 interrupt_request = cpu->interrupt_request;
497 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
498
499 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
500 }
501 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
502 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
503 cpu->exception_index = EXCP_DEBUG;
504 qemu_mutex_unlock_iothread();
505 return true;
506 }
507 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
508
509 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
510 replay_interrupt();
511 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
512 cpu->halted = 1;
513 cpu->exception_index = EXCP_HLT;
514 qemu_mutex_unlock_iothread();
515 return true;
516 }
517#if defined(TARGET_I386)
518 else if (interrupt_request & CPU_INTERRUPT_INIT) {
519 X86CPU *x86_cpu = X86_CPU(cpu);
520 CPUArchState *env = &x86_cpu->env;
521 replay_interrupt();
522 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
523 do_cpu_init(x86_cpu);
524 cpu->exception_index = EXCP_HALTED;
525 qemu_mutex_unlock_iothread();
526 return true;
527 }
528#else
529 else if (interrupt_request & CPU_INTERRUPT_RESET) {
530 replay_interrupt();
531 cpu_reset(cpu);
532 qemu_mutex_unlock_iothread();
533 return true;
534 }
535#endif
536
537
538
539
540 else {
541 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
542 replay_interrupt();
543 *last_tb = NULL;
544 }
545
546
547 interrupt_request = cpu->interrupt_request;
548 }
549 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
550 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
551
552
553 *last_tb = NULL;
554 }
555
556
557 qemu_mutex_unlock_iothread();
558 }
559
560
561 if (unlikely(atomic_read(&cpu->exit_request)
562 || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) {
563 atomic_set(&cpu->exit_request, 0);
564 cpu->exception_index = EXCP_INTERRUPT;
565 return true;
566 }
567
568 return false;
569}
570
571static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
572 TranslationBlock **last_tb, int *tb_exit)
573{
574 uintptr_t ret;
575 int32_t insns_left;
576
577 trace_exec_tb(tb, tb->pc);
578 ret = cpu_tb_exec(cpu, tb);
579 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
580 *tb_exit = ret & TB_EXIT_MASK;
581 if (*tb_exit != TB_EXIT_REQUESTED) {
582 *last_tb = tb;
583 return;
584 }
585
586 *last_tb = NULL;
587 insns_left = atomic_read(&cpu->icount_decr.u32);
588 atomic_set(&cpu->icount_decr.u16.high, 0);
589 if (insns_left < 0) {
590
591
592
593
594
595
596
597
598 smp_mb();
599 return;
600 }
601
602
603 assert(use_icount);
604#ifndef CONFIG_USER_ONLY
605
606 cpu_update_icount(cpu);
607
608 insns_left = MIN(0xffff, cpu->icount_budget);
609 cpu->icount_decr.u16.low = insns_left;
610 cpu->icount_extra = cpu->icount_budget - insns_left;
611 if (!cpu->icount_extra) {
612
613
614
615 if (insns_left > 0) {
616 cpu_exec_nocache(cpu, insns_left, tb, false);
617 }
618 }
619#endif
620}
621
622
623
624int cpu_exec(CPUState *cpu)
625{
626 CPUClass *cc = CPU_GET_CLASS(cpu);
627 int ret;
628 SyncClocks sc = { 0 };
629
630
631 current_cpu = cpu;
632
633 if (cpu_handle_halt(cpu)) {
634 return EXCP_HALTED;
635 }
636
637 rcu_read_lock();
638
639 cc->cpu_exec_enter(cpu);
640
641
642
643
644
645
646 init_delay_params(&sc, cpu);
647
648
649 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
650#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
651
652
653
654
655 cpu = current_cpu;
656 cc = CPU_GET_CLASS(cpu);
657#else
658
659 g_assert(cpu == current_cpu);
660 g_assert(cc == CPU_GET_CLASS(cpu));
661#endif
662 cpu->can_do_io = 1;
663 tb_lock_reset();
664 if (qemu_mutex_iothread_locked()) {
665 qemu_mutex_unlock_iothread();
666 }
667 }
668
669
670 while (!cpu_handle_exception(cpu, &ret)) {
671 TranslationBlock *last_tb = NULL;
672 int tb_exit = 0;
673
674 while (!cpu_handle_interrupt(cpu, &last_tb)) {
675 TranslationBlock *tb = tb_find(cpu, last_tb, tb_exit);
676 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
677
678
679 align_clocks(&sc, cpu);
680 }
681 }
682
683 cc->cpu_exec_exit(cpu);
684 rcu_read_unlock();
685
686 return ret;
687}
688