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25#include "qemu/osdep.h"
26#include "qapi/error.h"
27#include "qemu-common.h"
28#include "cpu.h"
29#include "hw/arm/fsl-imx25.h"
30#include "sysemu/sysemu.h"
31#include "exec/address-spaces.h"
32#include "hw/boards.h"
33#include "chardev/char.h"
34
35static void fsl_imx25_init(Object *obj)
36{
37 FslIMX25State *s = FSL_IMX25(obj);
38 int i;
39
40 object_initialize(&s->cpu, sizeof(s->cpu), "arm926-" TYPE_ARM_CPU);
41
42 object_initialize(&s->avic, sizeof(s->avic), TYPE_IMX_AVIC);
43 qdev_set_parent_bus(DEVICE(&s->avic), sysbus_get_default());
44
45 object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX25_CCM);
46 qdev_set_parent_bus(DEVICE(&s->ccm), sysbus_get_default());
47
48 for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
49 object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SERIAL);
50 qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
51 }
52
53 for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
54 object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX25_GPT);
55 qdev_set_parent_bus(DEVICE(&s->gpt[i]), sysbus_get_default());
56 }
57
58 for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
59 object_initialize(&s->epit[i], sizeof(s->epit[i]), TYPE_IMX_EPIT);
60 qdev_set_parent_bus(DEVICE(&s->epit[i]), sysbus_get_default());
61 }
62
63 object_initialize(&s->fec, sizeof(s->fec), TYPE_IMX_FEC);
64 qdev_set_parent_bus(DEVICE(&s->fec), sysbus_get_default());
65
66 for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
67 object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C);
68 qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default());
69 }
70
71 for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
72 object_initialize(&s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO);
73 qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus_get_default());
74 }
75}
76
77static void fsl_imx25_realize(DeviceState *dev, Error **errp)
78{
79 FslIMX25State *s = FSL_IMX25(dev);
80 uint8_t i;
81 Error *err = NULL;
82
83 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
84 if (err) {
85 error_propagate(errp, err);
86 return;
87 }
88
89 object_property_set_bool(OBJECT(&s->avic), true, "realized", &err);
90 if (err) {
91 error_propagate(errp, err);
92 return;
93 }
94 sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX25_AVIC_ADDR);
95 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0,
96 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
97 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
98 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
99
100 object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
101 if (err) {
102 error_propagate(errp, err);
103 return;
104 }
105 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX25_CCM_ADDR);
106
107
108 for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
109 static const struct {
110 hwaddr addr;
111 unsigned int irq;
112 } serial_table[FSL_IMX25_NUM_UARTS] = {
113 { FSL_IMX25_UART1_ADDR, FSL_IMX25_UART1_IRQ },
114 { FSL_IMX25_UART2_ADDR, FSL_IMX25_UART2_IRQ },
115 { FSL_IMX25_UART3_ADDR, FSL_IMX25_UART3_IRQ },
116 { FSL_IMX25_UART4_ADDR, FSL_IMX25_UART4_IRQ },
117 { FSL_IMX25_UART5_ADDR, FSL_IMX25_UART5_IRQ }
118 };
119
120 if (i < MAX_SERIAL_PORTS) {
121 Chardev *chr;
122
123 chr = serial_hds[i];
124
125 if (!chr) {
126 char label[20];
127 snprintf(label, sizeof(label), "imx31.uart%d", i);
128 chr = qemu_chr_new(label, "null");
129 }
130
131 qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", chr);
132 }
133
134 object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
135 if (err) {
136 error_propagate(errp, err);
137 return;
138 }
139 sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
140 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
141 qdev_get_gpio_in(DEVICE(&s->avic),
142 serial_table[i].irq));
143 }
144
145
146 for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
147 static const struct {
148 hwaddr addr;
149 unsigned int irq;
150 } gpt_table[FSL_IMX25_NUM_GPTS] = {
151 { FSL_IMX25_GPT1_ADDR, FSL_IMX25_GPT1_IRQ },
152 { FSL_IMX25_GPT2_ADDR, FSL_IMX25_GPT2_IRQ },
153 { FSL_IMX25_GPT3_ADDR, FSL_IMX25_GPT3_IRQ },
154 { FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ }
155 };
156
157 s->gpt[i].ccm = IMX_CCM(&s->ccm);
158
159 object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", &err);
160 if (err) {
161 error_propagate(errp, err);
162 return;
163 }
164 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, gpt_table[i].addr);
165 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
166 qdev_get_gpio_in(DEVICE(&s->avic),
167 gpt_table[i].irq));
168 }
169
170
171 for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
172 static const struct {
173 hwaddr addr;
174 unsigned int irq;
175 } epit_table[FSL_IMX25_NUM_EPITS] = {
176 { FSL_IMX25_EPIT1_ADDR, FSL_IMX25_EPIT1_IRQ },
177 { FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ }
178 };
179
180 s->epit[i].ccm = IMX_CCM(&s->ccm);
181
182 object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
183 if (err) {
184 error_propagate(errp, err);
185 return;
186 }
187 sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
188 sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
189 qdev_get_gpio_in(DEVICE(&s->avic),
190 epit_table[i].irq));
191 }
192
193 qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
194
195 object_property_set_bool(OBJECT(&s->fec), true, "realized", &err);
196 if (err) {
197 error_propagate(errp, err);
198 return;
199 }
200 sysbus_mmio_map(SYS_BUS_DEVICE(&s->fec), 0, FSL_IMX25_FEC_ADDR);
201 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fec), 0,
202 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ));
203
204
205
206 for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
207 static const struct {
208 hwaddr addr;
209 unsigned int irq;
210 } i2c_table[FSL_IMX25_NUM_I2CS] = {
211 { FSL_IMX25_I2C1_ADDR, FSL_IMX25_I2C1_IRQ },
212 { FSL_IMX25_I2C2_ADDR, FSL_IMX25_I2C2_IRQ },
213 { FSL_IMX25_I2C3_ADDR, FSL_IMX25_I2C3_IRQ }
214 };
215
216 object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
217 if (err) {
218 error_propagate(errp, err);
219 return;
220 }
221 sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
222 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
223 qdev_get_gpio_in(DEVICE(&s->avic),
224 i2c_table[i].irq));
225 }
226
227
228 for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
229 static const struct {
230 hwaddr addr;
231 unsigned int irq;
232 } gpio_table[FSL_IMX25_NUM_GPIOS] = {
233 { FSL_IMX25_GPIO1_ADDR, FSL_IMX25_GPIO1_IRQ },
234 { FSL_IMX25_GPIO2_ADDR, FSL_IMX25_GPIO2_IRQ },
235 { FSL_IMX25_GPIO3_ADDR, FSL_IMX25_GPIO3_IRQ },
236 { FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }
237 };
238
239 object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
240 if (err) {
241 error_propagate(errp, err);
242 return;
243 }
244 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
245
246 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
247 qdev_get_gpio_in(DEVICE(&s->avic),
248 gpio_table[i].irq));
249 }
250
251
252 memory_region_init_rom(&s->rom[0], NULL,
253 "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
254 if (err) {
255 error_propagate(errp, err);
256 return;
257 }
258 memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,
259 &s->rom[0]);
260 memory_region_init_rom(&s->rom[1], NULL,
261 "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err);
262 if (err) {
263 error_propagate(errp, err);
264 return;
265 }
266 memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM1_ADDR,
267 &s->rom[1]);
268
269
270 memory_region_init_ram(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE,
271 &err);
272 if (err) {
273 error_propagate(errp, err);
274 return;
275 }
276 memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ADDR,
277 &s->iram);
278
279
280 memory_region_init_alias(&s->iram_alias, NULL, "imx25.iram_alias",
281 &s->iram, 0, FSL_IMX25_IRAM_ALIAS_SIZE);
282 memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ALIAS_ADDR,
283 &s->iram_alias);
284}
285
286static void fsl_imx25_class_init(ObjectClass *oc, void *data)
287{
288 DeviceClass *dc = DEVICE_CLASS(oc);
289
290 dc->realize = fsl_imx25_realize;
291
292 dc->desc = "i.MX25 SOC";
293}
294
295static const TypeInfo fsl_imx25_type_info = {
296 .name = TYPE_FSL_IMX25,
297 .parent = TYPE_DEVICE,
298 .instance_size = sizeof(FslIMX25State),
299 .instance_init = fsl_imx25_init,
300 .class_init = fsl_imx25_class_init,
301};
302
303static void fsl_imx25_register_types(void)
304{
305 type_register_static(&fsl_imx25_type_info);
306}
307
308type_init(fsl_imx25_register_types)
309
