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30#include "qemu/osdep.h"
31#include "hw/hw.h"
32#include "hw/loader.h"
33#include "sysemu/arch_init.h"
34#include "hw/i2c/smbus.h"
35#include "hw/boards.h"
36#include "hw/timer/mc146818rtc.h"
37#include "hw/xen/xen.h"
38#include "sysemu/kvm.h"
39#include "kvm_i386.h"
40#include "hw/kvm/clock.h"
41#include "hw/pci-host/q35.h"
42#include "exec/address-spaces.h"
43#include "hw/i386/pc.h"
44#include "hw/i386/ich9.h"
45#include "hw/smbios/smbios.h"
46#include "hw/ide/pci.h"
47#include "hw/ide/ahci.h"
48#include "hw/usb.h"
49#include "qemu/error-report.h"
50#include "sysemu/numa.h"
51
52
53#define MAX_SATA_PORTS 6
54
55
56static void pc_q35_init(MachineState *machine)
57{
58 PCMachineState *pcms = PC_MACHINE(machine);
59 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
60 Q35PCIHost *q35_host;
61 PCIHostState *phb;
62 PCIBus *host_bus;
63 PCIDevice *lpc;
64 DeviceState *lpc_dev;
65 BusState *idebus[MAX_SATA_PORTS];
66 ISADevice *rtc_state;
67 MemoryRegion *system_io = get_system_io();
68 MemoryRegion *pci_memory;
69 MemoryRegion *rom_memory;
70 MemoryRegion *ram_memory;
71 GSIState *gsi_state;
72 ISABus *isa_bus;
73 qemu_irq *i8259;
74 int i;
75 ICH9LPCState *ich9_lpc;
76 PCIDevice *ahci;
77 ram_addr_t lowmem;
78 DriveInfo *hd[MAX_SATA_PORTS];
79 MachineClass *mc = MACHINE_GET_CLASS(machine);
80
81
82
83
84
85
86
87
88 if (machine->ram_size >= 0xb0000000) {
89 lowmem = 0x80000000;
90 } else {
91 lowmem = 0xb0000000;
92 }
93
94
95
96
97 if (!pcms->max_ram_below_4g) {
98 pcms->max_ram_below_4g = 1ULL << 32; ;
99 }
100 if (lowmem > pcms->max_ram_below_4g) {
101 lowmem = pcms->max_ram_below_4g;
102 if (machine->ram_size - lowmem > lowmem &&
103 lowmem & ((1ULL << 30) - 1)) {
104 warn_report("Large machine and max_ram_below_4g(%"PRIu64
105 ") not a multiple of 1G; possible bad performance.",
106 pcms->max_ram_below_4g);
107 }
108 }
109
110 if (machine->ram_size >= lowmem) {
111 pcms->above_4g_mem_size = machine->ram_size - lowmem;
112 pcms->below_4g_mem_size = lowmem;
113 } else {
114 pcms->above_4g_mem_size = 0;
115 pcms->below_4g_mem_size = machine->ram_size;
116 }
117
118 if (xen_enabled()) {
119 xen_hvm_init(pcms, &ram_memory);
120 }
121
122 pc_cpus_init(pcms);
123
124 kvmclock_create();
125
126
127 if (pcmc->pci_enabled) {
128 pci_memory = g_new(MemoryRegion, 1);
129 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
130 rom_memory = pci_memory;
131 } else {
132 pci_memory = NULL;
133 rom_memory = get_system_memory();
134 }
135
136 pc_guest_info_init(pcms);
137
138 if (pcmc->smbios_defaults) {
139
140 smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
141 mc->name, pcmc->smbios_legacy_mode,
142 pcmc->smbios_uuid_encoded,
143 SMBIOS_ENTRY_POINT_21);
144 }
145
146
147 if (!xen_enabled()) {
148 pc_memory_init(pcms, get_system_memory(),
149 rom_memory, &ram_memory);
150 }
151
152
153 gsi_state = g_malloc0(sizeof(*gsi_state));
154 if (kvm_ioapic_in_kernel()) {
155 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
156 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
157 GSI_NUM_PINS);
158 } else {
159 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
160 }
161
162
163 q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
164
165 object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
166 object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory),
167 MCH_HOST_PROP_RAM_MEM, NULL);
168 object_property_set_link(OBJECT(q35_host), OBJECT(pci_memory),
169 MCH_HOST_PROP_PCI_MEM, NULL);
170 object_property_set_link(OBJECT(q35_host), OBJECT(get_system_memory()),
171 MCH_HOST_PROP_SYSTEM_MEM, NULL);
172 object_property_set_link(OBJECT(q35_host), OBJECT(system_io),
173 MCH_HOST_PROP_IO_MEM, NULL);
174 object_property_set_int(OBJECT(q35_host), pcms->below_4g_mem_size,
175 PCI_HOST_BELOW_4G_MEM_SIZE, NULL);
176 object_property_set_int(OBJECT(q35_host), pcms->above_4g_mem_size,
177 PCI_HOST_ABOVE_4G_MEM_SIZE, NULL);
178
179 qdev_init_nofail(DEVICE(q35_host));
180 phb = PCI_HOST_BRIDGE(q35_host);
181 host_bus = phb->bus;
182
183 lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
184 ICH9_LPC_FUNC), true,
185 TYPE_ICH9_LPC_DEVICE);
186
187 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
188 TYPE_HOTPLUG_HANDLER,
189 (Object **)&pcms->acpi_dev,
190 object_property_allow_set_link,
191 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
192 object_property_set_link(OBJECT(machine), OBJECT(lpc),
193 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
194
195 ich9_lpc = ICH9_LPC_DEVICE(lpc);
196 lpc_dev = DEVICE(lpc);
197 for (i = 0; i < GSI_NUM_PINS; i++) {
198 qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, pcms->gsi[i]);
199 }
200 pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
201 ICH9_LPC_NB_PIRQS);
202 pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
203 isa_bus = ich9_lpc->isa_bus;
204
205 if (kvm_pic_in_kernel()) {
206 i8259 = kvm_i8259_init(isa_bus);
207 } else if (xen_enabled()) {
208 i8259 = xen_interrupt_controller_init();
209 } else {
210 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
211 }
212
213 for (i = 0; i < ISA_NUM_IRQS; i++) {
214 gsi_state->i8259_irq[i] = i8259[i];
215 }
216 g_free(i8259);
217
218 if (pcmc->pci_enabled) {
219 ioapic_init_gsi(gsi_state, "q35");
220 }
221
222 pc_register_ferr_irq(pcms->gsi[13]);
223
224 assert(pcms->vmport != ON_OFF_AUTO__MAX);
225 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
226 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
227 }
228
229
230 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, !mc->no_floppy,
231 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit,
232 0xff0104);
233
234
235 ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms));
236
237 if (pcms->sata) {
238
239 ahci = pci_create_simple_multifunction(host_bus,
240 PCI_DEVFN(ICH9_SATA1_DEV,
241 ICH9_SATA1_FUNC),
242 true, "ich9-ahci");
243 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
244 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
245 g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci));
246 ide_drive_get(hd, ahci_get_num_ports(ahci));
247 ahci_ide_create_devs(ahci, hd);
248 } else {
249 idebus[0] = idebus[1] = NULL;
250 }
251
252 if (machine_usb(machine)) {
253
254 ehci_create_ich9_with_companions(host_bus, 0x1d);
255 }
256
257 if (pcms->smbus) {
258
259 smbus_eeprom_init(ich9_smb_init(host_bus,
260 PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
261 0xb100),
262 8, NULL, 0);
263 }
264
265 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
266
267
268 pc_vga_init(isa_bus, host_bus);
269 pc_nic_init(isa_bus, host_bus);
270 if (pcmc->pci_enabled) {
271 pc_pci_device_init(host_bus);
272 }
273
274 if (pcms->acpi_nvdimm_state.is_enabled) {
275 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
276 pcms->fw_cfg, OBJECT(pcms));
277 }
278}
279
280#define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
281 static void pc_init_##suffix(MachineState *machine) \
282 { \
283 void (*compat)(MachineState *m) = (compatfn); \
284 if (compat) { \
285 compat(machine); \
286 } \
287 pc_q35_init(machine); \
288 } \
289 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
290
291
292static void pc_q35_machine_options(MachineClass *m)
293{
294 m->family = "pc_q35";
295 m->desc = "Standard PC (Q35 + ICH9, 2009)";
296 m->hot_add_cpu = pc_hot_add_cpu;
297 m->units_per_default_bus = 1;
298 m->default_machine_opts = "firmware=bios-256k.bin";
299 m->default_display = "std";
300 m->no_floppy = 1;
301 m->has_dynamic_sysbus = true;
302 m->max_cpus = 288;
303}
304
305static void pc_q35_2_10_machine_options(MachineClass *m)
306{
307 pc_q35_machine_options(m);
308 m->alias = "q35";
309 m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
310}
311
312DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL,
313 pc_q35_2_10_machine_options);
314
315static void pc_q35_2_9_machine_options(MachineClass *m)
316{
317 pc_q35_2_10_machine_options(m);
318 m->alias = NULL;
319 SET_MACHINE_COMPAT(m, PC_COMPAT_2_9);
320}
321
322DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL,
323 pc_q35_2_9_machine_options);
324
325static void pc_q35_2_8_machine_options(MachineClass *m)
326{
327 pc_q35_2_9_machine_options(m);
328 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8);
329}
330
331DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
332 pc_q35_2_8_machine_options);
333
334static void pc_q35_2_7_machine_options(MachineClass *m)
335{
336 pc_q35_2_8_machine_options(m);
337 m->max_cpus = 255;
338 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7);
339}
340
341DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
342 pc_q35_2_7_machine_options);
343
344static void pc_q35_2_6_machine_options(MachineClass *m)
345{
346 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
347 pc_q35_2_7_machine_options(m);
348 pcmc->legacy_cpu_hotplug = true;
349 pcmc->linuxboot_dma_enabled = false;
350 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
351}
352
353DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
354 pc_q35_2_6_machine_options);
355
356static void pc_q35_2_5_machine_options(MachineClass *m)
357{
358 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
359 pc_q35_2_6_machine_options(m);
360 pcmc->save_tsc_khz = false;
361 m->legacy_fw_cfg_order = 1;
362 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
363}
364
365DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
366 pc_q35_2_5_machine_options);
367
368static void pc_q35_2_4_machine_options(MachineClass *m)
369{
370 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
371 pc_q35_2_5_machine_options(m);
372 m->hw_version = "2.4.0";
373 pcmc->broken_reserved_end = true;
374 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
375}
376
377DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
378 pc_q35_2_4_machine_options);
379
