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26#include "qemu/osdep.h"
27#include "qapi/error.h"
28#include "hw/hw.h"
29#include "hw/i386/pc.h"
30#include "hw/ide.h"
31#include "hw/pci/pci.h"
32#include "hw/irq.h"
33#include "hw/xen/xen_common.h"
34#include "hw/xen/xen_backend.h"
35#include "trace.h"
36#include "exec/address-spaces.h"
37#include "sysemu/block-backend.h"
38#include "qemu/error-report.h"
39
40#include <xenguest.h>
41
42
43
44#ifdef DEBUG_PLATFORM
45#define DPRINTF(fmt, ...) do { \
46 fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
47} while (0)
48#else
49#define DPRINTF(fmt, ...) do { } while (0)
50#endif
51
52#define PFFLAG_ROM_LOCK 1
53
54typedef struct PCIXenPlatformState {
55
56 PCIDevice parent_obj;
57
58
59 MemoryRegion fixed_io;
60 MemoryRegion bar;
61 MemoryRegion mmio_bar;
62 uint8_t flags;
63 int drivers_blacklisted;
64 uint16_t driver_product_version;
65
66
67 char log_buffer[4096];
68 int log_buffer_off;
69} PCIXenPlatformState;
70
71#define TYPE_XEN_PLATFORM "xen-platform"
72#define XEN_PLATFORM(obj) \
73 OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
74
75#define XEN_PLATFORM_IOPORT 0x10
76
77
78static void log_writeb(PCIXenPlatformState *s, char val)
79{
80 if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
81
82 s->log_buffer[s->log_buffer_off] = 0;
83 trace_xen_platform_log(s->log_buffer);
84 s->log_buffer_off = 0;
85 } else {
86 s->log_buffer[s->log_buffer_off++] = val;
87 }
88}
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103#define _UNPLUG_IDE_SCSI_DISKS 0
104#define UNPLUG_IDE_SCSI_DISKS (1u << _UNPLUG_IDE_SCSI_DISKS)
105
106#define _UNPLUG_ALL_NICS 1
107#define UNPLUG_ALL_NICS (1u << _UNPLUG_ALL_NICS)
108
109#define _UNPLUG_AUX_IDE_DISKS 2
110#define UNPLUG_AUX_IDE_DISKS (1u << _UNPLUG_AUX_IDE_DISKS)
111
112#define _UNPLUG_NVME_DISKS 3
113#define UNPLUG_NVME_DISKS (1u << _UNPLUG_NVME_DISKS)
114
115static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
116{
117
118 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
119 PCI_CLASS_NETWORK_ETHERNET
120 && strcmp(d->name, "xen-pci-passthrough") != 0) {
121 object_unparent(OBJECT(d));
122 }
123}
124
125
126static void del_nic_peer(NICState *nic, void *opaque)
127{
128 NetClientState *nc;
129
130 nc = qemu_get_queue(nic);
131 if (nc->peer)
132 qemu_del_net_client(nc->peer);
133}
134
135static void pci_unplug_nics(PCIBus *bus)
136{
137 qemu_foreach_nic(del_nic_peer, NULL);
138 pci_for_each_device(bus, 0, unplug_nic, NULL);
139}
140
141static void unplug_disks(PCIBus *b, PCIDevice *d, void *opaque)
142{
143 uint32_t flags = *(uint32_t *)opaque;
144 bool aux = (flags & UNPLUG_AUX_IDE_DISKS) &&
145 !(flags & UNPLUG_IDE_SCSI_DISKS);
146
147
148 if (!strcmp(d->name, "xen-pci-passthrough")) {
149 return;
150 }
151
152 switch (pci_get_word(d->config + PCI_CLASS_DEVICE)) {
153 case PCI_CLASS_STORAGE_IDE:
154 pci_piix3_xen_ide_unplug(DEVICE(d), aux);
155 break;
156
157 case PCI_CLASS_STORAGE_SCSI:
158 if (!aux) {
159 object_unparent(OBJECT(d));
160 }
161 break;
162
163 case PCI_CLASS_STORAGE_EXPRESS:
164 if (flags & UNPLUG_NVME_DISKS) {
165 object_unparent(OBJECT(d));
166 }
167
168 default:
169 break;
170 }
171}
172
173static void pci_unplug_disks(PCIBus *bus, uint32_t flags)
174{
175 pci_for_each_device(bus, 0, unplug_disks, &flags);
176}
177
178static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
179{
180 PCIXenPlatformState *s = opaque;
181
182 switch (addr) {
183 case 0: {
184 PCIDevice *pci_dev = PCI_DEVICE(s);
185
186 if (val & (UNPLUG_IDE_SCSI_DISKS | UNPLUG_AUX_IDE_DISKS |
187 UNPLUG_NVME_DISKS)) {
188 DPRINTF("unplug disks\n");
189 pci_unplug_disks(pci_dev->bus, val);
190 }
191 if (val & UNPLUG_ALL_NICS) {
192 DPRINTF("unplug nics\n");
193 pci_unplug_nics(pci_dev->bus);
194 }
195 break;
196 }
197 case 2:
198 switch (val) {
199 case 1:
200 DPRINTF("Citrix Windows PV drivers loaded in guest\n");
201 break;
202 case 0:
203 DPRINTF("Guest claimed to be running PV product 0?\n");
204 break;
205 default:
206 DPRINTF("Unknown PV product %d loaded in guest\n", val);
207 break;
208 }
209 s->driver_product_version = val;
210 break;
211 }
212}
213
214static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
215 uint32_t val)
216{
217 switch (addr) {
218 case 0:
219
220 break;
221 }
222}
223
224static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
225{
226 PCIXenPlatformState *s = opaque;
227
228 switch (addr) {
229 case 0: {
230 hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
231 HVMMEM_ram_ro : HVMMEM_ram_rw;
232 if (xen_set_mem_type(xen_domid, mem_type, 0xc0, 0x40)) {
233 DPRINTF("unable to change ro/rw state of ROM memory area!\n");
234 } else {
235 s->flags = val & PFFLAG_ROM_LOCK;
236 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
237 (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
238 }
239 break;
240 }
241 case 2:
242 log_writeb(s, val);
243 break;
244 }
245}
246
247static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
248{
249 PCIXenPlatformState *s = opaque;
250
251 switch (addr) {
252 case 0:
253 if (s->drivers_blacklisted) {
254
255
256 return 0xd249;
257 } else {
258
259 return 0x49d2;
260 }
261 default:
262 return 0xffff;
263 }
264}
265
266static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
267{
268 PCIXenPlatformState *s = opaque;
269
270 switch (addr) {
271 case 0:
272
273 return s->flags;
274 case 2:
275
276 return 1;
277 default:
278 return 0xff;
279 }
280}
281
282static void platform_fixed_ioport_reset(void *opaque)
283{
284 PCIXenPlatformState *s = opaque;
285
286 platform_fixed_ioport_writeb(s, 0, 0);
287}
288
289static uint64_t platform_fixed_ioport_read(void *opaque,
290 hwaddr addr,
291 unsigned size)
292{
293 switch (size) {
294 case 1:
295 return platform_fixed_ioport_readb(opaque, addr);
296 case 2:
297 return platform_fixed_ioport_readw(opaque, addr);
298 default:
299 return -1;
300 }
301}
302
303static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
304
305 uint64_t val, unsigned size)
306{
307 switch (size) {
308 case 1:
309 platform_fixed_ioport_writeb(opaque, addr, val);
310 break;
311 case 2:
312 platform_fixed_ioport_writew(opaque, addr, val);
313 break;
314 case 4:
315 platform_fixed_ioport_writel(opaque, addr, val);
316 break;
317 }
318}
319
320
321static const MemoryRegionOps platform_fixed_io_ops = {
322 .read = platform_fixed_ioport_read,
323 .write = platform_fixed_ioport_write,
324 .valid = {
325 .unaligned = true,
326 },
327 .impl = {
328 .min_access_size = 1,
329 .max_access_size = 4,
330 .unaligned = true,
331 },
332 .endianness = DEVICE_LITTLE_ENDIAN,
333};
334
335static void platform_fixed_ioport_init(PCIXenPlatformState* s)
336{
337 memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
338 "xen-fixed", 16);
339 memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
340 &s->fixed_io);
341}
342
343
344
345static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
346 unsigned int size)
347{
348 if (addr == 0) {
349 return platform_fixed_ioport_readb(opaque, 0);
350 } else {
351 return ~0u;
352 }
353}
354
355static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
356 uint64_t val, unsigned int size)
357{
358 PCIXenPlatformState *s = opaque;
359 PCIDevice *pci_dev = PCI_DEVICE(s);
360
361 switch (addr) {
362 case 0:
363 platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
364 break;
365 case 4:
366 if (val == 1) {
367
368
369
370
371
372
373
374
375 pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS);
376 pci_unplug_nics(pci_dev->bus);
377 }
378 break;
379 case 8:
380 switch (val) {
381 case 1:
382 pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS);
383 break;
384 case 2:
385 pci_unplug_nics(pci_dev->bus);
386 break;
387 default:
388 log_writeb(s, (uint32_t)val);
389 break;
390 }
391 break;
392 default:
393 break;
394 }
395}
396
397static const MemoryRegionOps xen_pci_io_ops = {
398 .read = xen_platform_ioport_readb,
399 .write = xen_platform_ioport_writeb,
400 .impl.min_access_size = 1,
401 .impl.max_access_size = 1,
402};
403
404static void platform_ioport_bar_setup(PCIXenPlatformState *d)
405{
406 memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
407 "xen-pci", 0x100);
408}
409
410static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
411 unsigned size)
412{
413 DPRINTF("Warning: attempted read from physical address "
414 "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
415
416 return 0;
417}
418
419static void platform_mmio_write(void *opaque, hwaddr addr,
420 uint64_t val, unsigned size)
421{
422 DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
423 "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
424 val, addr);
425}
426
427static const MemoryRegionOps platform_mmio_handler = {
428 .read = &platform_mmio_read,
429 .write = &platform_mmio_write,
430 .endianness = DEVICE_NATIVE_ENDIAN,
431};
432
433static void platform_mmio_setup(PCIXenPlatformState *d)
434{
435 memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
436 "xen-mmio", 0x1000000);
437}
438
439static int xen_platform_post_load(void *opaque, int version_id)
440{
441 PCIXenPlatformState *s = opaque;
442
443 platform_fixed_ioport_writeb(s, 0, s->flags);
444
445 return 0;
446}
447
448static const VMStateDescription vmstate_xen_platform = {
449 .name = "platform",
450 .version_id = 4,
451 .minimum_version_id = 4,
452 .post_load = xen_platform_post_load,
453 .fields = (VMStateField[]) {
454 VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
455 VMSTATE_UINT8(flags, PCIXenPlatformState),
456 VMSTATE_END_OF_LIST()
457 }
458};
459
460static void xen_platform_realize(PCIDevice *dev, Error **errp)
461{
462 PCIXenPlatformState *d = XEN_PLATFORM(dev);
463 uint8_t *pci_conf;
464
465
466 if (!xen_enabled()) {
467 error_setg(errp, "xen-platform device requires the Xen accelerator");
468 return;
469 }
470
471 pci_conf = dev->config;
472
473 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
474
475 pci_config_set_prog_interface(pci_conf, 0);
476
477 pci_conf[PCI_INTERRUPT_PIN] = 1;
478
479 platform_ioport_bar_setup(d);
480 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
481
482
483 platform_mmio_setup(d);
484 pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
485 &d->mmio_bar);
486
487 platform_fixed_ioport_init(d);
488}
489
490static void platform_reset(DeviceState *dev)
491{
492 PCIXenPlatformState *s = XEN_PLATFORM(dev);
493
494 platform_fixed_ioport_reset(s);
495}
496
497static void xen_platform_class_init(ObjectClass *klass, void *data)
498{
499 DeviceClass *dc = DEVICE_CLASS(klass);
500 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
501
502 k->realize = xen_platform_realize;
503 k->vendor_id = PCI_VENDOR_ID_XEN;
504 k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
505 k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
506 k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
507 k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
508 k->revision = 1;
509 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
510 dc->desc = "XEN platform pci device";
511 dc->reset = platform_reset;
512 dc->vmsd = &vmstate_xen_platform;
513}
514
515static const TypeInfo xen_platform_info = {
516 .name = TYPE_XEN_PLATFORM,
517 .parent = TYPE_PCI_DEVICE,
518 .instance_size = sizeof(PCIXenPlatformState),
519 .class_init = xen_platform_class_init,
520};
521
522static void xen_platform_register_types(void)
523{
524 type_register_static(&xen_platform_info);
525}
526
527type_init(xen_platform_register_types)
528