LXR qemu/hw/openrisc/cputimer.c

   1/*
   2 * QEMU OpenRISC timer support
   3 *
   4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
   5 *                         Zhizhou Zhang <etouzh@gmail.com>
   6 *
   7 * This library is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU Lesser General Public
   9 * License as published by the Free Software Foundation; either
  10 * version 2 of the License, or (at your option) any later version.
  11 *
  12 * This library is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * Lesser General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU Lesser General Public
  18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20
  21#include "qemu/osdep.h"
  22#include "cpu.h"
  23#include "hw/hw.h"
  24#include "qemu/timer.h"
  25
  26#define TIMER_PERIOD 50 /* 50 ns period for 20 MHz timer */
  27
  28/* The time when TTCR changes */
  29static uint64_t last_clk;
  30static int is_counting;
  31
  32void cpu_openrisc_count_update(OpenRISCCPU *cpu)
  33{
  34    uint64_t now;
  35
  36    if (!is_counting) {
  37        return;
  38    }
  39    now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  40    cpu->env.ttcr += (uint32_t)((now - last_clk) / TIMER_PERIOD);
  41    last_clk = now;
  42}
  43
  44void cpu_openrisc_timer_update(OpenRISCCPU *cpu)
  45{
  46    uint32_t wait;
  47    uint64_t now, next;
  48
  49    if (!is_counting) {
  50        return;
  51    }
  52
  53    cpu_openrisc_count_update(cpu);
  54    now = last_clk;
  55
  56    if ((cpu->env.ttmr & TTMR_TP) <= (cpu->env.ttcr & TTMR_TP)) {
  57        wait = TTMR_TP - (cpu->env.ttcr & TTMR_TP) + 1;
  58        wait += cpu->env.ttmr & TTMR_TP;
  59    } else {
  60        wait = (cpu->env.ttmr & TTMR_TP) - (cpu->env.ttcr & TTMR_TP);
  61    }
  62    next = now + (uint64_t)wait * TIMER_PERIOD;
  63    timer_mod(cpu->env.timer, next);
  64    qemu_cpu_kick(CPU(cpu));
  65}
  66
  67void cpu_openrisc_count_start(OpenRISCCPU *cpu)
  68{
  69    is_counting = 1;
  70    cpu_openrisc_count_update(cpu);
  71}
  72
  73void cpu_openrisc_count_stop(OpenRISCCPU *cpu)
  74{
  75    timer_del(cpu->env.timer);
  76    cpu_openrisc_count_update(cpu);
  77    is_counting = 0;
  78}
  79
  80static void openrisc_timer_cb(void *opaque)
  81{
  82    OpenRISCCPU *cpu = opaque;
  83
  84    if ((cpu->env.ttmr & TTMR_IE) &&
  85         timer_expired(cpu->env.timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL))) {
  86        CPUState *cs = CPU(cpu);
  87
  88        cpu->env.ttmr |= TTMR_IP;
  89        cs->interrupt_request |= CPU_INTERRUPT_TIMER;
  90    }
  91
  92    switch (cpu->env.ttmr & TTMR_M) {
  93    case TIMER_NONE:
  94        break;
  95    case TIMER_INTR:
  96        cpu->env.ttcr = 0;
  97        break;
  98    case TIMER_SHOT:
  99        cpu_openrisc_count_stop(cpu);
 100        break;
 101    case TIMER_CONT:
 102        break;
 103    }
 104
 105    cpu_openrisc_timer_update(cpu);
 106}
 107
 108void cpu_openrisc_clock_init(OpenRISCCPU *cpu)
 109{
 110    cpu->env.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &openrisc_timer_cb, cpu);
 111    cpu->env.ttmr = 0x00000000;
 112    cpu->env.ttcr = 0x00000000;
 113}
 114