LXR qemu/include/hw/acpi/acpi.h

   1#ifndef QEMU_HW_ACPI_H
   2#define QEMU_HW_ACPI_H
   3
   4/*
   5 *  Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6 *                     VA Linux Systems Japan K.K.
   7 *
   8 * This library is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU Lesser General Public
  10 * License as published by the Free Software Foundation; either
  11 * version 2 of the License, or (at your option) any later version.
  12 *
  13 * This library is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 * Lesser General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU Lesser General Public
  19 * License along with this library; if not, see
  20 * <http://www.gnu.org/licenses/>.
  21 */
  22
  23#include "qemu/notify.h"
  24#include "qemu/option.h"
  25#include "exec/memory.h"
  26#include "hw/irq.h"
  27#include "hw/acpi/acpi_dev_interface.h"
  28
  29/*
  30 * current device naming scheme supports up to 256 memory devices
  31 */
  32#define ACPI_MAX_RAM_SLOTS 256
  33
  34/* from linux include/acpi/actype.h */
  35/* Default ACPI register widths */
  36
  37#define ACPI_GPE_REGISTER_WIDTH         8
  38#define ACPI_PM1_REGISTER_WIDTH         16
  39#define ACPI_PM2_REGISTER_WIDTH         8
  40#define ACPI_PM_TIMER_WIDTH             32
  41
  42/* PM Timer ticks per second (HZ) */
  43#define PM_TIMER_FREQUENCY  3579545
  44
  45
  46/* ACPI fixed hardware registers */
  47
  48/* from linux/drivers/acpi/acpica/aclocal.h */
  49/* Masks used to access the bit_registers */
  50
  51/* PM1x_STS */
  52#define ACPI_BITMASK_TIMER_STATUS               0x0001
  53#define ACPI_BITMASK_BUS_MASTER_STATUS          0x0010
  54#define ACPI_BITMASK_GLOBAL_LOCK_STATUS         0x0020
  55#define ACPI_BITMASK_POWER_BUTTON_STATUS        0x0100
  56#define ACPI_BITMASK_SLEEP_BUTTON_STATUS        0x0200
  57#define ACPI_BITMASK_RT_CLOCK_STATUS            0x0400
  58#define ACPI_BITMASK_PCIEXP_WAKE_STATUS         0x4000  /* ACPI 3.0 */
  59#define ACPI_BITMASK_WAKE_STATUS                0x8000
  60
  61#define ACPI_BITMASK_ALL_FIXED_STATUS           (\
  62        ACPI_BITMASK_TIMER_STATUS          | \
  63        ACPI_BITMASK_BUS_MASTER_STATUS     | \
  64        ACPI_BITMASK_GLOBAL_LOCK_STATUS    | \
  65        ACPI_BITMASK_POWER_BUTTON_STATUS   | \
  66        ACPI_BITMASK_SLEEP_BUTTON_STATUS   | \
  67        ACPI_BITMASK_RT_CLOCK_STATUS       | \
  68        ACPI_BITMASK_WAKE_STATUS)
  69
  70/* PM1x_EN */
  71#define ACPI_BITMASK_TIMER_ENABLE               0x0001
  72#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE         0x0020
  73#define ACPI_BITMASK_POWER_BUTTON_ENABLE        0x0100
  74#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE        0x0200
  75#define ACPI_BITMASK_RT_CLOCK_ENABLE            0x0400
  76#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE        0x4000  /* ACPI 3.0 */
  77
  78#define ACPI_BITMASK_PM1_COMMON_ENABLED         ( \
  79        ACPI_BITMASK_RT_CLOCK_ENABLE        | \
  80        ACPI_BITMASK_POWER_BUTTON_ENABLE    | \
  81        ACPI_BITMASK_GLOBAL_LOCK_ENABLE     | \
  82        ACPI_BITMASK_TIMER_ENABLE)
  83
  84/* PM1x_CNT */
  85#define ACPI_BITMASK_SCI_ENABLE                 0x0001
  86#define ACPI_BITMASK_BUS_MASTER_RLD             0x0002
  87#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE        0x0004
  88#define ACPI_BITMASK_SLEEP_TYPE                 0x1C00
  89#define ACPI_BITMASK_SLEEP_ENABLE               0x2000
  90
  91/* PM2_CNT */
  92#define ACPI_BITMASK_ARB_DISABLE                0x0001
  93
  94/* structs */
  95typedef struct ACPIPMTimer ACPIPMTimer;
  96typedef struct ACPIPM1EVT ACPIPM1EVT;
  97typedef struct ACPIPM1CNT ACPIPM1CNT;
  98typedef struct ACPIGPE ACPIGPE;
  99typedef struct ACPIREGS ACPIREGS;
 100
 101typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
 102
 103struct ACPIPMTimer {
 104    QEMUTimer *timer;
 105    MemoryRegion io;
 106    int64_t overflow_time;
 107
 108    acpi_update_sci_fn update_sci;
 109};
 110
 111struct ACPIPM1EVT {
 112    MemoryRegion io;
 113    uint16_t sts;
 114    uint16_t en;
 115    acpi_update_sci_fn update_sci;
 116};
 117
 118struct ACPIPM1CNT {
 119    MemoryRegion io;
 120    uint16_t cnt;
 121    uint8_t s4_val;
 122};
 123
 124struct ACPIGPE {
 125    uint8_t len;
 126
 127    uint8_t *sts;
 128    uint8_t *en;
 129};
 130
 131struct ACPIREGS {
 132    ACPIPMTimer     tmr;
 133    ACPIGPE         gpe;
 134    struct {
 135        ACPIPM1EVT  evt;
 136        ACPIPM1CNT  cnt;
 137    } pm1;
 138    Notifier wakeup;
 139};
 140
 141/* PM_TMR */
 142void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
 143void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
 144void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
 145                      MemoryRegion *parent);
 146void acpi_pm_tmr_reset(ACPIREGS *ar);
 147
 148/* PM1a_EVT: piix and ich9 don't implement PM1b. */
 149uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
 150void acpi_pm1_evt_power_down(ACPIREGS *ar);
 151void acpi_pm1_evt_reset(ACPIREGS *ar);
 152void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
 153                       MemoryRegion *parent);
 154
 155/* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
 156void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
 157                       bool disable_s3, bool disable_s4, uint8_t s4_val);
 158void acpi_pm1_cnt_update(ACPIREGS *ar,
 159                         bool sci_enable, bool sci_disable);
 160void acpi_pm1_cnt_reset(ACPIREGS *ar);
 161
 162/* GPE0 */
 163void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
 164void acpi_gpe_reset(ACPIREGS *ar);
 165
 166void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
 167uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
 168
 169void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
 170                         AcpiEventStatusBits status);
 171
 172void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
 173
 174/* acpi.c */
 175extern int acpi_enabled;
 176extern char unsigned *acpi_tables;
 177extern size_t acpi_tables_len;
 178
 179uint8_t *acpi_table_first(void);
 180uint8_t *acpi_table_next(uint8_t *current);
 181unsigned acpi_table_len(void *current);
 182void acpi_table_add(const QemuOpts *opts, Error **errp);
 183void acpi_table_add_builtin(const QemuOpts *opts, Error **errp);
 184
 185typedef struct AcpiSlicOem AcpiSlicOem;
 186struct AcpiSlicOem {
 187  char *id;
 188  char *table_id;
 189};
 190int acpi_get_slic_oem(AcpiSlicOem *oem);
 191
 192#endif /* QEMU_HW_ACPI_H */
 193