LXR qemu/include/hw/pci/pci

   1/*
   2 * QEMU PCI bridge
   3 *
   4 * Copyright (c) 2004 Fabrice Bellard
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  19 *
  20 * split out pci bus specific stuff from pci.[hc] to pci_bridge.[hc]
  21 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
  22 *                    VA Linux Systems Japan K.K.
  23 *
  24 */
  25
  26#ifndef QEMU_PCI_BRIDGE_H
  27#define QEMU_PCI_BRIDGE_H
  28
  29#include "hw/pci/pci.h"
  30
  31#define PCI_BRIDGE_DEV_PROP_CHASSIS_NR "chassis_nr"
  32#define PCI_BRIDGE_DEV_PROP_MSI        "msi"
  33#define PCI_BRIDGE_DEV_PROP_SHPC       "shpc"
  34
  35int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
  36                          uint16_t svid, uint16_t ssid,
  37                          Error **errp);
  38
  39PCIDevice *pci_bridge_get_device(PCIBus *bus);
  40PCIBus *pci_bridge_get_sec_bus(PCIBridge *br);
  41
  42pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type);
  43pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type);
  44
  45void pci_bridge_update_mappings(PCIBridge *br);
  46void pci_bridge_write_config(PCIDevice *d,
  47                             uint32_t address, uint32_t val, int len);
  48void pci_bridge_disable_base_limit(PCIDevice *dev);
  49void pci_bridge_reset(DeviceState *qdev);
  50
  51void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename);
  52void pci_bridge_exitfn(PCIDevice *pci_dev);
  53
  54
  55/*
  56 * before qdev initialization(qdev_init()), this function sets bus_name and
  57 * map_irq callback which are necessry for pci_bridge_initfn() to
  58 * initialize bus.
  59 */
  60void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
  61                        pci_map_irq_fn map_irq);
  62
  63/* TODO: add this define to pci_regs.h in linux and then in qemu. */
  64#define  PCI_BRIDGE_CTL_VGA_16BIT       0x10    /* VGA 16-bit decode */
  65#define  PCI_BRIDGE_CTL_DISCARD         0x100   /* Primary discard timer */
  66#define  PCI_BRIDGE_CTL_SEC_DISCARD     0x200   /* Secondary discard timer */
  67#define  PCI_BRIDGE_CTL_DISCARD_STATUS  0x400   /* Discard timer status */
  68#define  PCI_BRIDGE_CTL_DISCARD_SERR    0x800   /* Discard timer SERR# enable */
  69
  70typedef struct PCIBridgeQemuCap {
  71    uint8_t id;     /* Standard PCI capability header field */
  72    uint8_t next;   /* Standard PCI capability header field */
  73    uint8_t len;    /* Standard PCI vendor-specific capability header field */
  74    uint8_t type;   /* Red Hat vendor-specific capability type.
  75                       Types are defined with REDHAT_PCI_CAP_ prefix */
  76
  77    uint32_t bus_res;   /* Minimum number of buses to reserve */
  78    uint64_t io;        /* IO space to reserve */
  79    uint32_t mem;       /* Non-prefetchable memory to reserve */
  80    /* At most one of the following two fields may be set to a value
  81     * different from -1 */
  82    uint32_t mem_pref_32; /* Prefetchable memory to reserve (32-bit MMIO) */
  83    uint64_t mem_pref_64; /* Prefetchable memory to reserve (64-bit MMIO) */
  84} PCIBridgeQemuCap;
  85
  86#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
  87
  88int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
  89                              uint32_t bus_reserve, uint64_t io_reserve,
  90                              uint32_t mem_non_pref_reserve,
  91                              uint32_t mem_pref_32_reserve,
  92                              uint64_t mem_pref_64_reserve,
  93                              Error **errp);
  94
  95#endif /* QEMU_PCI_BRIDGE_H */
  96