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21#include "qemu/osdep.h"
22#include "qapi/error.h"
23#include "qemu-common.h"
24#include "qom/cpu.h"
25#include "sysemu/hw_accel.h"
26#include "qemu/notify.h"
27#include "qemu/log.h"
28#include "exec/log.h"
29#include "exec/cpu-common.h"
30#include "qemu/error-report.h"
31#include "sysemu/sysemu.h"
32#include "hw/boards.h"
33#include "hw/qdev-properties.h"
34#include "trace-root.h"
35
36CPUInterruptHandler cpu_interrupt_handler;
37
38CPUState *cpu_by_arch_id(int64_t id)
39{
40 CPUState *cpu;
41
42 CPU_FOREACH(cpu) {
43 CPUClass *cc = CPU_GET_CLASS(cpu);
44
45 if (cc->get_arch_id(cpu) == id) {
46 return cpu;
47 }
48 }
49 return NULL;
50}
51
52bool cpu_exists(int64_t id)
53{
54 return !!cpu_by_arch_id(id);
55}
56
57CPUState *cpu_create(const char *typename)
58{
59 Error *err = NULL;
60 CPUState *cpu = CPU(object_new(typename));
61 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
62 if (err != NULL) {
63 error_report_err(err);
64 object_unref(OBJECT(cpu));
65 exit(EXIT_FAILURE);
66 }
67 return cpu;
68}
69
70const char *cpu_parse_cpu_model(const char *typename, const char *cpu_model)
71{
72 ObjectClass *oc;
73 CPUClass *cc;
74 gchar **model_pieces;
75 const char *cpu_type;
76
77 model_pieces = g_strsplit(cpu_model, ",", 2);
78
79 oc = cpu_class_by_name(typename, model_pieces[0]);
80 if (oc == NULL) {
81 error_report("unable to find CPU model '%s'", model_pieces[0]);
82 g_strfreev(model_pieces);
83 exit(EXIT_FAILURE);
84 }
85
86 cpu_type = object_class_get_name(oc);
87 cc = CPU_CLASS(oc);
88 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
89 g_strfreev(model_pieces);
90 return cpu_type;
91}
92
93CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
94{
95
96
97
98 return cpu_create(cpu_parse_cpu_model(typename, cpu_model));
99}
100
101bool cpu_paging_enabled(const CPUState *cpu)
102{
103 CPUClass *cc = CPU_GET_CLASS(cpu);
104
105 return cc->get_paging_enabled(cpu);
106}
107
108static bool cpu_common_get_paging_enabled(const CPUState *cpu)
109{
110 return false;
111}
112
113void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
114 Error **errp)
115{
116 CPUClass *cc = CPU_GET_CLASS(cpu);
117
118 cc->get_memory_mapping(cpu, list, errp);
119}
120
121static void cpu_common_get_memory_mapping(CPUState *cpu,
122 MemoryMappingList *list,
123 Error **errp)
124{
125 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
126}
127
128
129
130void cpu_reset_interrupt(CPUState *cpu, int mask)
131{
132 bool need_lock = !qemu_mutex_iothread_locked();
133
134 if (need_lock) {
135 qemu_mutex_lock_iothread();
136 }
137 cpu->interrupt_request &= ~mask;
138 if (need_lock) {
139 qemu_mutex_unlock_iothread();
140 }
141}
142
143void cpu_exit(CPUState *cpu)
144{
145 atomic_set(&cpu->exit_request, 1);
146
147 smp_wmb();
148 atomic_set(&cpu->icount_decr.u16.high, -1);
149}
150
151int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
152 void *opaque)
153{
154 CPUClass *cc = CPU_GET_CLASS(cpu);
155
156 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
157}
158
159static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
160 CPUState *cpu, void *opaque)
161{
162 return 0;
163}
164
165int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
166 int cpuid, void *opaque)
167{
168 CPUClass *cc = CPU_GET_CLASS(cpu);
169
170 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
171}
172
173static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
174 CPUState *cpu, int cpuid,
175 void *opaque)
176{
177 return -1;
178}
179
180int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
181 void *opaque)
182{
183 CPUClass *cc = CPU_GET_CLASS(cpu);
184
185 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
186}
187
188static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
189 CPUState *cpu, void *opaque)
190{
191 return 0;
192}
193
194int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
195 int cpuid, void *opaque)
196{
197 CPUClass *cc = CPU_GET_CLASS(cpu);
198
199 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
200}
201
202static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
203 CPUState *cpu, int cpuid,
204 void *opaque)
205{
206 return -1;
207}
208
209
210static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
211{
212 return 0;
213}
214
215static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
216{
217 return 0;
218}
219
220static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
221{
222
223
224
225 return true;
226}
227
228bool target_words_bigendian(void);
229static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
230{
231 return target_words_bigendian();
232}
233
234static void cpu_common_noop(CPUState *cpu)
235{
236}
237
238static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
239{
240 return false;
241}
242
243GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
244{
245 CPUClass *cc = CPU_GET_CLASS(cpu);
246 GuestPanicInformation *res = NULL;
247
248 if (cc->get_crash_info) {
249 res = cc->get_crash_info(cpu);
250 }
251 return res;
252}
253
254void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
255 int flags)
256{
257 CPUClass *cc = CPU_GET_CLASS(cpu);
258
259 if (cc->dump_state) {
260 cpu_synchronize_state(cpu);
261 cc->dump_state(cpu, f, cpu_fprintf, flags);
262 }
263}
264
265void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
266 int flags)
267{
268 CPUClass *cc = CPU_GET_CLASS(cpu);
269
270 if (cc->dump_statistics) {
271 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
272 }
273}
274
275void cpu_reset(CPUState *cpu)
276{
277 CPUClass *klass = CPU_GET_CLASS(cpu);
278
279 if (klass->reset != NULL) {
280 (*klass->reset)(cpu);
281 }
282
283 trace_guest_cpu_reset(cpu);
284}
285
286static void cpu_common_reset(CPUState *cpu)
287{
288 CPUClass *cc = CPU_GET_CLASS(cpu);
289
290 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
291 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
292 log_cpu_state(cpu, cc->reset_dump_flags);
293 }
294
295 cpu->interrupt_request = 0;
296 cpu->halted = 0;
297 cpu->mem_io_pc = 0;
298 cpu->mem_io_vaddr = 0;
299 cpu->icount_extra = 0;
300 cpu->icount_decr.u32 = 0;
301 cpu->can_do_io = 1;
302 cpu->exception_index = -1;
303 cpu->crash_occurred = false;
304 cpu->cflags_next_tb = -1;
305
306 if (tcg_enabled()) {
307 cpu_tb_jmp_cache_clear(cpu);
308
309 tcg_flush_softmmu_tlb(cpu);
310 }
311}
312
313static bool cpu_common_has_work(CPUState *cs)
314{
315 return false;
316}
317
318ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
319{
320 CPUClass *cc;
321
322 if (!cpu_model) {
323 return NULL;
324 }
325 cc = CPU_CLASS(object_class_by_name(typename));
326
327 return cc->class_by_name(cpu_model);
328}
329
330static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
331{
332 return NULL;
333}
334
335static void cpu_common_parse_features(const char *typename, char *features,
336 Error **errp)
337{
338 char *featurestr;
339 char *val;
340 static bool cpu_globals_initialized;
341
342
343
344
345
346
347
348 if (cpu_globals_initialized) {
349 return;
350 }
351 cpu_globals_initialized = true;
352
353 featurestr = features ? strtok(features, ",") : NULL;
354
355 while (featurestr) {
356 val = strchr(featurestr, '=');
357 if (val) {
358 GlobalProperty *prop = g_new0(typeof(*prop), 1);
359 *val = 0;
360 val++;
361 prop->driver = typename;
362 prop->property = g_strdup(featurestr);
363 prop->value = g_strdup(val);
364 prop->errp = &error_fatal;
365 qdev_prop_register_global(prop);
366 } else {
367 error_setg(errp, "Expected key=value format, found %s.",
368 featurestr);
369 return;
370 }
371 featurestr = strtok(NULL, ",");
372 }
373}
374
375static void cpu_common_realizefn(DeviceState *dev, Error **errp)
376{
377 CPUState *cpu = CPU(dev);
378 Object *machine = qdev_get_machine();
379
380
381
382
383
384 if (object_dynamic_cast(machine, TYPE_MACHINE)) {
385 ObjectClass *oc = object_get_class(machine);
386 MachineClass *mc = MACHINE_CLASS(oc);
387
388 if (mc) {
389 cpu->ignore_memory_transaction_failures =
390 mc->ignore_memory_transaction_failures;
391 }
392 }
393
394 if (dev->hotplugged) {
395 cpu_synchronize_post_init(cpu);
396 cpu_resume(cpu);
397 }
398
399
400 trace_init_vcpu(cpu);
401}
402
403static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
404{
405 CPUState *cpu = CPU(dev);
406
407 trace_fini_vcpu(cpu);
408 cpu_exec_unrealizefn(cpu);
409}
410
411static void cpu_common_initfn(Object *obj)
412{
413 CPUState *cpu = CPU(obj);
414 CPUClass *cc = CPU_GET_CLASS(obj);
415
416 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
417 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
418
419
420 cpu->nr_cores = 1;
421 cpu->nr_threads = 1;
422
423 qemu_mutex_init(&cpu->work_mutex);
424 QTAILQ_INIT(&cpu->breakpoints);
425 QTAILQ_INIT(&cpu->watchpoints);
426
427 cpu_exec_initfn(cpu);
428}
429
430static void cpu_common_finalize(Object *obj)
431{
432}
433
434static int64_t cpu_common_get_arch_id(CPUState *cpu)
435{
436 return cpu->cpu_index;
437}
438
439static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
440{
441 return addr;
442}
443
444static void generic_handle_interrupt(CPUState *cpu, int mask)
445{
446 cpu->interrupt_request |= mask;
447
448 if (!qemu_cpu_is_self(cpu)) {
449 qemu_cpu_kick(cpu);
450 }
451}
452
453CPUInterruptHandler cpu_interrupt_handler = generic_handle_interrupt;
454
455static void cpu_class_init(ObjectClass *klass, void *data)
456{
457 DeviceClass *dc = DEVICE_CLASS(klass);
458 CPUClass *k = CPU_CLASS(klass);
459
460 k->class_by_name = cpu_common_class_by_name;
461 k->parse_features = cpu_common_parse_features;
462 k->reset = cpu_common_reset;
463 k->get_arch_id = cpu_common_get_arch_id;
464 k->has_work = cpu_common_has_work;
465 k->get_paging_enabled = cpu_common_get_paging_enabled;
466 k->get_memory_mapping = cpu_common_get_memory_mapping;
467 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
468 k->write_elf32_note = cpu_common_write_elf32_note;
469 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
470 k->write_elf64_note = cpu_common_write_elf64_note;
471 k->gdb_read_register = cpu_common_gdb_read_register;
472 k->gdb_write_register = cpu_common_gdb_write_register;
473 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
474 k->debug_excp_handler = cpu_common_noop;
475 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
476 k->cpu_exec_enter = cpu_common_noop;
477 k->cpu_exec_exit = cpu_common_noop;
478 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
479 k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
480 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
481 dc->realize = cpu_common_realizefn;
482 dc->unrealize = cpu_common_unrealizefn;
483 dc->props = cpu_common_props;
484
485
486
487
488 dc->user_creatable = false;
489}
490
491static const TypeInfo cpu_type_info = {
492 .name = TYPE_CPU,
493 .parent = TYPE_DEVICE,
494 .instance_size = sizeof(CPUState),
495 .instance_init = cpu_common_initfn,
496 .instance_finalize = cpu_common_finalize,
497 .abstract = true,
498 .class_size = sizeof(CPUClass),
499 .class_init = cpu_class_init,
500};
501
502static void cpu_register_types(void)
503{
504 type_register_static(&cpu_type_info);
505}
506
507type_init(cpu_register_types)
508