1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19#include "qemu/osdep.h"
20#include "cpu.h"
21#include "disas/disas.h"
22#include "exec/exec-all.h"
23#include "tcg.h"
24#include "qemu/bitops.h"
25#include "exec/cpu_ldst.h"
26#include "translate-all.h"
27#include "exec/helper-proto.h"
28
29#undef EAX
30#undef ECX
31#undef EDX
32#undef EBX
33#undef ESP
34#undef EBP
35#undef ESI
36#undef EDI
37#undef EIP
38#ifdef __linux__
39#include <sys/ucontext.h>
40#endif
41
42__thread uintptr_t helper_retaddr;
43
44
45
46
47
48
49static void cpu_exit_tb_from_sighandler(CPUState *cpu, sigset_t *old_set)
50{
51
52 sigprocmask(SIG_SETMASK, old_set, NULL);
53 cpu_loop_exit_noexc(cpu);
54}
55
56
57
58
59
60static inline int handle_cpu_signal(uintptr_t pc, unsigned long address,
61 int is_write, sigset_t *old_set)
62{
63 CPUState *cpu = current_cpu;
64 CPUClass *cc;
65 int ret;
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82 if (helper_retaddr) {
83 pc = helper_retaddr;
84 } else {
85 pc += GETPC_ADJ;
86 }
87
88
89
90
91
92
93
94
95 if (!cpu || !cpu->running) {
96 printf("qemu:%s received signal outside vCPU context @ pc=0x%"
97 PRIxPTR "\n", __func__, pc);
98 abort();
99 }
100
101#if defined(DEBUG_SIGNAL)
102 printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
103 pc, address, is_write, *(unsigned long *)old_set);
104#endif
105
106 if (is_write && h2g_valid(address)) {
107 switch (page_unprotect(h2g(address), pc)) {
108 case 0:
109
110
111
112 break;
113 case 1:
114
115
116
117
118 return 1;
119 case 2:
120
121
122
123
124 helper_retaddr = 0;
125 cpu_exit_tb_from_sighandler(cpu, old_set);
126
127
128 default:
129 g_assert_not_reached();
130 }
131 }
132
133
134
135 address = h2g_nocheck(address);
136
137 cc = CPU_GET_CLASS(cpu);
138
139 g_assert(cc->handle_mmu_fault);
140 ret = cc->handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX);
141
142 if (ret == 0) {
143
144
145
146 return 1;
147 }
148
149
150
151
152 helper_retaddr = 0;
153
154 if (ret < 0) {
155 return 0;
156 }
157
158
159 cpu_restore_state(cpu, pc);
160
161 sigprocmask(SIG_SETMASK, old_set, NULL);
162 cpu_loop_exit(cpu);
163
164
165 return 1;
166}
167
168#if defined(__i386__)
169
170#if defined(__NetBSD__)
171#include <ucontext.h>
172
173#define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
174#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
175#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
176#define MASK_sig(context) ((context)->uc_sigmask)
177#elif defined(__FreeBSD__) || defined(__DragonFly__)
178#include <ucontext.h>
179
180#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip))
181#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
182#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
183#define MASK_sig(context) ((context)->uc_sigmask)
184#elif defined(__OpenBSD__)
185#define EIP_sig(context) ((context)->sc_eip)
186#define TRAP_sig(context) ((context)->sc_trapno)
187#define ERROR_sig(context) ((context)->sc_err)
188#define MASK_sig(context) ((context)->sc_mask)
189#else
190#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
191#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
192#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
193#define MASK_sig(context) ((context)->uc_sigmask)
194#endif
195
196int cpu_signal_handler(int host_signum, void *pinfo,
197 void *puc)
198{
199 siginfo_t *info = pinfo;
200#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
201 ucontext_t *uc = puc;
202#elif defined(__OpenBSD__)
203 struct sigcontext *uc = puc;
204#else
205 ucontext_t *uc = puc;
206#endif
207 unsigned long pc;
208 int trapno;
209
210#ifndef REG_EIP
211
212#define REG_EIP EIP
213#define REG_ERR ERR
214#define REG_TRAPNO TRAPNO
215#endif
216 pc = EIP_sig(uc);
217 trapno = TRAP_sig(uc);
218 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
219 trapno == 0xe ?
220 (ERROR_sig(uc) >> 1) & 1 : 0,
221 &MASK_sig(uc));
222}
223
224#elif defined(__x86_64__)
225
226#ifdef __NetBSD__
227#define PC_sig(context) _UC_MACHINE_PC(context)
228#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
229#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
230#define MASK_sig(context) ((context)->uc_sigmask)
231#elif defined(__OpenBSD__)
232#define PC_sig(context) ((context)->sc_rip)
233#define TRAP_sig(context) ((context)->sc_trapno)
234#define ERROR_sig(context) ((context)->sc_err)
235#define MASK_sig(context) ((context)->sc_mask)
236#elif defined(__FreeBSD__) || defined(__DragonFly__)
237#include <ucontext.h>
238
239#define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip))
240#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
241#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
242#define MASK_sig(context) ((context)->uc_sigmask)
243#else
244#define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
245#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
246#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
247#define MASK_sig(context) ((context)->uc_sigmask)
248#endif
249
250int cpu_signal_handler(int host_signum, void *pinfo,
251 void *puc)
252{
253 siginfo_t *info = pinfo;
254 unsigned long pc;
255#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
256 ucontext_t *uc = puc;
257#elif defined(__OpenBSD__)
258 struct sigcontext *uc = puc;
259#else
260 ucontext_t *uc = puc;
261#endif
262
263 pc = PC_sig(uc);
264 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
265 TRAP_sig(uc) == 0xe ?
266 (ERROR_sig(uc) >> 1) & 1 : 0,
267 &MASK_sig(uc));
268}
269
270#elif defined(_ARCH_PPC)
271
272
273
274
275
276#ifdef linux
277
278#define REG_sig(reg_name, context) \
279 ((context)->uc_mcontext.regs->reg_name)
280
281#define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context)
282
283#define IAR_sig(context) REG_sig(nip, context)
284
285#define MSR_sig(context) REG_sig(msr, context)
286
287#define CTR_sig(context) REG_sig(ctr, context)
288
289#define XER_sig(context) REG_sig(xer, context)
290
291#define LR_sig(context) REG_sig(link, context)
292
293#define CR_sig(context) REG_sig(ccr, context)
294
295
296#define FLOAT_sig(reg_num, context) \
297 (((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num])
298#define FPSCR_sig(context) \
299 (*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4)))
300
301#define DAR_sig(context) REG_sig(dar, context)
302#define DSISR_sig(context) REG_sig(dsisr, context)
303#define TRAP_sig(context) REG_sig(trap, context)
304#endif
305
306#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
307#include <ucontext.h>
308#define IAR_sig(context) ((context)->uc_mcontext.mc_srr0)
309#define MSR_sig(context) ((context)->uc_mcontext.mc_srr1)
310#define CTR_sig(context) ((context)->uc_mcontext.mc_ctr)
311#define XER_sig(context) ((context)->uc_mcontext.mc_xer)
312#define LR_sig(context) ((context)->uc_mcontext.mc_lr)
313#define CR_sig(context) ((context)->uc_mcontext.mc_cr)
314
315#define DAR_sig(context) ((context)->uc_mcontext.mc_dar)
316#define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr)
317#define TRAP_sig(context) ((context)->uc_mcontext.mc_exc)
318#endif
319
320int cpu_signal_handler(int host_signum, void *pinfo,
321 void *puc)
322{
323 siginfo_t *info = pinfo;
324#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
325 ucontext_t *uc = puc;
326#else
327 ucontext_t *uc = puc;
328#endif
329 unsigned long pc;
330 int is_write;
331
332 pc = IAR_sig(uc);
333 is_write = 0;
334#if 0
335
336 if (DSISR_sig(uc) & 0x00800000) {
337 is_write = 1;
338 }
339#else
340 if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) {
341 is_write = 1;
342 }
343#endif
344 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
345 is_write, &uc->uc_sigmask);
346}
347
348#elif defined(__alpha__)
349
350int cpu_signal_handler(int host_signum, void *pinfo,
351 void *puc)
352{
353 siginfo_t *info = pinfo;
354 ucontext_t *uc = puc;
355 uint32_t *pc = uc->uc_mcontext.sc_pc;
356 uint32_t insn = *pc;
357 int is_write = 0;
358
359
360 switch (insn >> 26) {
361 case 0x0d:
362 case 0x0e:
363 case 0x0f:
364 case 0x24:
365 case 0x25:
366 case 0x26:
367 case 0x27:
368 case 0x2c:
369 case 0x2d:
370 case 0x2e:
371 case 0x2f:
372 is_write = 1;
373 }
374
375 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
376 is_write, &uc->uc_sigmask);
377}
378#elif defined(__sparc__)
379
380int cpu_signal_handler(int host_signum, void *pinfo,
381 void *puc)
382{
383 siginfo_t *info = pinfo;
384 int is_write;
385 uint32_t insn;
386#if !defined(__arch64__) || defined(CONFIG_SOLARIS)
387 uint32_t *regs = (uint32_t *)(info + 1);
388 void *sigmask = (regs + 20);
389
390 unsigned long pc = regs[1];
391#else
392#ifdef __linux__
393 struct sigcontext *sc = puc;
394 unsigned long pc = sc->sigc_regs.tpc;
395 void *sigmask = (void *)sc->sigc_mask;
396#elif defined(__OpenBSD__)
397 struct sigcontext *uc = puc;
398 unsigned long pc = uc->sc_pc;
399 void *sigmask = (void *)(long)uc->sc_mask;
400#elif defined(__NetBSD__)
401 ucontext_t *uc = puc;
402 unsigned long pc = _UC_MACHINE_PC(uc);
403 void *sigmask = (void *)&uc->uc_sigmask;
404#endif
405#endif
406
407
408 is_write = 0;
409 insn = *(uint32_t *)pc;
410 if ((insn >> 30) == 3) {
411 switch ((insn >> 19) & 0x3f) {
412 case 0x05:
413 case 0x15:
414 case 0x06:
415 case 0x16:
416 case 0x04:
417 case 0x14:
418 case 0x07:
419 case 0x17:
420 case 0x0e:
421 case 0x1e:
422 case 0x24:
423 case 0x34:
424 case 0x27:
425 case 0x37:
426 case 0x26:
427 case 0x36:
428 case 0x25:
429 case 0x3c:
430 case 0x3e:
431 is_write = 1;
432 break;
433 }
434 }
435 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
436 is_write, sigmask);
437}
438
439#elif defined(__arm__)
440
441#if defined(__NetBSD__)
442#include <ucontext.h>
443#endif
444
445int cpu_signal_handler(int host_signum, void *pinfo,
446 void *puc)
447{
448 siginfo_t *info = pinfo;
449#if defined(__NetBSD__)
450 ucontext_t *uc = puc;
451#else
452 ucontext_t *uc = puc;
453#endif
454 unsigned long pc;
455 int is_write;
456
457#if defined(__NetBSD__)
458 pc = uc->uc_mcontext.__gregs[_REG_R15];
459#elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3))
460 pc = uc->uc_mcontext.gregs[R15];
461#else
462 pc = uc->uc_mcontext.arm_pc;
463#endif
464
465
466
467
468 is_write = extract32(uc->uc_mcontext.error_code, 11, 1);
469 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
470 is_write,
471 &uc->uc_sigmask);
472}
473
474#elif defined(__aarch64__)
475
476int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
477{
478 siginfo_t *info = pinfo;
479 ucontext_t *uc = puc;
480 uintptr_t pc = uc->uc_mcontext.pc;
481 uint32_t insn = *(uint32_t *)pc;
482 bool is_write;
483
484
485 is_write = ( (insn & 0xbfff0000) == 0x0c000000
486 || (insn & 0xbfe00000) == 0x0c800000
487 || (insn & 0xbfdf0000) == 0x0d000000
488 || (insn & 0xbfc00000) == 0x0d800000
489 || (insn & 0x3f400000) == 0x08000000
490 || (insn & 0x3bc00000) == 0x39000000
491 || (insn & 0x3fc00000) == 0x3d800000
492
493 || (insn & 0x3bc00000) == 0x38000000
494 || (insn & 0x3fe00000) == 0x3c800000
495
496 || (insn & 0x3a400000) == 0x28000000);
497
498 return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
499 is_write, &uc->uc_sigmask);
500}
501
502#elif defined(__ia64)
503
504#ifndef __ISR_VALID
505
506# define __ISR_VALID 1
507#endif
508
509int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
510{
511 siginfo_t *info = pinfo;
512 ucontext_t *uc = puc;
513 unsigned long ip;
514 int is_write = 0;
515
516 ip = uc->uc_mcontext.sc_ip;
517 switch (host_signum) {
518 case SIGILL:
519 case SIGFPE:
520 case SIGSEGV:
521 case SIGBUS:
522 case SIGTRAP:
523 if (info->si_code && (info->si_segvflags & __ISR_VALID)) {
524
525 is_write = (info->si_isr >> 33) & 1;
526 }
527 break;
528
529 default:
530 break;
531 }
532 return handle_cpu_signal(ip, (unsigned long)info->si_addr,
533 is_write,
534 (sigset_t *)&uc->uc_sigmask);
535}
536
537#elif defined(__s390__)
538
539int cpu_signal_handler(int host_signum, void *pinfo,
540 void *puc)
541{
542 siginfo_t *info = pinfo;
543 ucontext_t *uc = puc;
544 unsigned long pc;
545 uint16_t *pinsn;
546 int is_write = 0;
547
548 pc = uc->uc_mcontext.psw.addr;
549
550
551
552
553
554
555
556
557 pinsn = (uint16_t *)pc;
558 switch (pinsn[0] >> 8) {
559 case 0x50:
560 case 0x42:
561 case 0x40:
562 is_write = 1;
563 break;
564 case 0xc4:
565 switch (pinsn[0] & 0xf) {
566 case 0xf:
567 case 0xb:
568 case 0x7:
569 is_write = 1;
570 }
571 break;
572 case 0xe3:
573 switch (pinsn[2] & 0xff) {
574 case 0x50:
575 case 0x24:
576 case 0x72:
577 case 0x70:
578 case 0x8e:
579 case 0x3f:
580 case 0x3e:
581 case 0x2f:
582 is_write = 1;
583 }
584 break;
585 }
586 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
587 is_write, &uc->uc_sigmask);
588}
589
590#elif defined(__mips__)
591
592int cpu_signal_handler(int host_signum, void *pinfo,
593 void *puc)
594{
595 siginfo_t *info = pinfo;
596 ucontext_t *uc = puc;
597 greg_t pc = uc->uc_mcontext.pc;
598 int is_write;
599
600
601 is_write = 0;
602 return handle_cpu_signal(pc, (unsigned long)info->si_addr,
603 is_write, &uc->uc_sigmask);
604}
605
606#else
607
608#error host CPU specific signal handler needed
609
610#endif
611
612
613
614
615static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
616 int size, uintptr_t retaddr)
617{
618
619 if (unlikely(addr & (size - 1))) {
620 cpu_loop_exit_atomic(ENV_GET_CPU(env), retaddr);
621 }
622 helper_retaddr = retaddr;
623 return g2h(addr);
624}
625
626
627#define ATOMIC_MMU_DECLS do {} while (0)
628#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, DATA_SIZE, GETPC())
629#define ATOMIC_MMU_CLEANUP do { helper_retaddr = 0; } while (0)
630
631#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
632#define EXTRA_ARGS
633
634#define DATA_SIZE 1
635#include "atomic_template.h"
636
637#define DATA_SIZE 2
638#include "atomic_template.h"
639
640#define DATA_SIZE 4
641#include "atomic_template.h"
642
643#ifdef CONFIG_ATOMIC64
644#define DATA_SIZE 8
645#include "atomic_template.h"
646#endif
647
648
649
650
651#ifdef CONFIG_ATOMIC128
652
653#undef EXTRA_ARGS
654#undef ATOMIC_NAME
655#undef ATOMIC_MMU_LOOKUP
656
657#define EXTRA_ARGS , TCGMemOpIdx oi, uintptr_t retaddr
658#define ATOMIC_NAME(X) \
659 HELPER(glue(glue(glue(atomic_ ## X, SUFFIX), END), _mmu))
660#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, DATA_SIZE, retaddr)
661
662#define DATA_SIZE 16
663#include "atomic_template.h"
664#endif
665