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18#include "qemu/osdep.h"
19#include "qapi/error.h"
20#include "qemu-common.h"
21#include "cpu.h"
22#include "hw/arm/xlnx-zynqmp.h"
23#include "hw/boards.h"
24#include "qemu/error-report.h"
25#include "exec/address-spaces.h"
26#include "qemu/log.h"
27#include "sysemu/qtest.h"
28
29typedef struct XlnxZCU102 {
30 MachineState parent_obj;
31
32 XlnxZynqMPState soc;
33 MemoryRegion ddr_ram;
34
35 bool secure;
36 bool virt;
37} XlnxZCU102;
38
39#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
40#define ZCU102_MACHINE(obj) \
41 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
42
43#define TYPE_EP108_MACHINE MACHINE_TYPE_NAME("xlnx-ep108")
44#define EP108_MACHINE(obj) \
45 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_EP108_MACHINE)
46
47static struct arm_boot_info xlnx_zcu102_binfo;
48
49static bool zcu102_get_secure(Object *obj, Error **errp)
50{
51 XlnxZCU102 *s = ZCU102_MACHINE(obj);
52
53 return s->secure;
54}
55
56static void zcu102_set_secure(Object *obj, bool value, Error **errp)
57{
58 XlnxZCU102 *s = ZCU102_MACHINE(obj);
59
60 s->secure = value;
61}
62
63static bool zcu102_get_virt(Object *obj, Error **errp)
64{
65 XlnxZCU102 *s = ZCU102_MACHINE(obj);
66
67 return s->virt;
68}
69
70static void zcu102_set_virt(Object *obj, bool value, Error **errp)
71{
72 XlnxZCU102 *s = ZCU102_MACHINE(obj);
73
74 s->virt = value;
75}
76
77static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
78{
79 int i;
80 uint64_t ram_size = machine->ram_size;
81
82
83 if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
84 error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
85 "0x%llx", ram_size,
86 XLNX_ZYNQMP_MAX_RAM_SIZE);
87 exit(1);
88 }
89
90 if (ram_size < 0x08000000) {
91 qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
92 ram_size);
93 }
94
95 memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
96 ram_size);
97
98 object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
99 object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
100 &error_abort);
101
102 object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
103 "ddr-ram", &error_abort);
104 object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
105 &error_fatal);
106 object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
107 &error_fatal);
108
109 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
110
111
112 for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
113 BusState *bus;
114 DriveInfo *di = drive_get_next(IF_SD);
115 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
116 DeviceState *carddev;
117 char *bus_name;
118
119 bus_name = g_strdup_printf("sd-bus%d", i);
120 bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
121 g_free(bus_name);
122 if (!bus) {
123 error_report("No SD bus found for SD card %d", i);
124 exit(1);
125 }
126 carddev = qdev_create(bus, TYPE_SD_CARD);
127 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
128 object_property_set_bool(OBJECT(carddev), true, "realized",
129 &error_fatal);
130 }
131
132 for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
133 SSIBus *spi_bus;
134 DeviceState *flash_dev;
135 qemu_irq cs_line;
136 DriveInfo *dinfo = drive_get_next(IF_MTD);
137 gchar *bus_name = g_strdup_printf("spi%d", i);
138
139 spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
140 g_free(bus_name);
141
142 flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
143 if (dinfo) {
144 qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
145 &error_fatal);
146 }
147 qdev_init_nofail(flash_dev);
148
149 cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
150
151 sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
152 }
153
154
155
156 xlnx_zcu102_binfo.ram_size = ram_size;
157 xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
158 xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
159 xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
160 xlnx_zcu102_binfo.loader_start = 0;
161 arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
162}
163
164static void xlnx_ep108_init(MachineState *machine)
165{
166 XlnxZCU102 *s = EP108_MACHINE(machine);
167
168 if (!qtest_enabled()) {
169 info_report("The Xilinx EP108 machine is deprecated, please use the "
170 "ZCU102 machine (which has the same features) instead.");
171 }
172
173 xlnx_zynqmp_init(s, machine);
174}
175
176static void xlnx_ep108_machine_instance_init(Object *obj)
177{
178 XlnxZCU102 *s = EP108_MACHINE(obj);
179
180
181 s->secure = false;
182 s->virt = false;
183}
184
185static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
186{
187 MachineClass *mc = MACHINE_CLASS(oc);
188
189 mc->desc = "Xilinx ZynqMP EP108 board (Deprecated, please use xlnx-zcu102)";
190 mc->init = xlnx_ep108_init;
191 mc->block_default_type = IF_IDE;
192 mc->units_per_default_bus = 1;
193 mc->ignore_memory_transaction_failures = true;
194 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
195 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
196}
197
198static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
199 .name = MACHINE_TYPE_NAME("xlnx-ep108"),
200 .parent = TYPE_MACHINE,
201 .class_init = xlnx_ep108_machine_class_init,
202 .instance_init = xlnx_ep108_machine_instance_init,
203 .instance_size = sizeof(XlnxZCU102),
204};
205
206static void xlnx_ep108_machine_init_register_types(void)
207{
208 type_register_static(&xlnx_ep108_machine_init_typeinfo);
209}
210
211static void xlnx_zcu102_init(MachineState *machine)
212{
213 XlnxZCU102 *s = ZCU102_MACHINE(machine);
214
215 xlnx_zynqmp_init(s, machine);
216}
217
218static void xlnx_zcu102_machine_instance_init(Object *obj)
219{
220 XlnxZCU102 *s = ZCU102_MACHINE(obj);
221
222
223 s->secure = false;
224 object_property_add_bool(obj, "secure", zcu102_get_secure,
225 zcu102_set_secure, NULL);
226 object_property_set_description(obj, "secure",
227 "Set on/off to enable/disable the ARM "
228 "Security Extensions (TrustZone)",
229 NULL);
230
231
232 s->virt = false;
233 object_property_add_bool(obj, "virtualization", zcu102_get_virt,
234 zcu102_set_virt, NULL);
235 object_property_set_description(obj, "virtualization",
236 "Set on/off to enable/disable emulating a "
237 "guest CPU which implements the ARM "
238 "Virtualization Extensions",
239 NULL);
240}
241
242static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
243{
244 MachineClass *mc = MACHINE_CLASS(oc);
245
246 mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5s based on " \
247 "the value of smp";
248 mc->init = xlnx_zcu102_init;
249 mc->block_default_type = IF_IDE;
250 mc->units_per_default_bus = 1;
251 mc->ignore_memory_transaction_failures = true;
252 mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
253 mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
254}
255
256static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
257 .name = MACHINE_TYPE_NAME("xlnx-zcu102"),
258 .parent = TYPE_MACHINE,
259 .class_init = xlnx_zcu102_machine_class_init,
260 .instance_init = xlnx_zcu102_machine_instance_init,
261 .instance_size = sizeof(XlnxZCU102),
262};
263
264static void xlnx_zcu102_machine_init_register_types(void)
265{
266 type_register_static(&xlnx_zcu102_machine_init_typeinfo);
267}
268
269type_init(xlnx_zcu102_machine_init_register_types)
270type_init(xlnx_ep108_machine_init_register_types)
271
